Patents Examined by Tuan To
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Patent number: 10069920Abstract: The invention relates to a method for controlling an online service outside the vehicle by using an operating device of a motor vehicle. The method includes determining an operating input performed by a user on the operating device and selecting one of several service functions of the online service depending on the operating input. This selection capability should be adapted to the vehicle type-dependent operating concept of the motor vehicle. The operating elements available on the operating device are determined and converter data, which contain a control instruction for controlling the selection of the service function depending on operation signals of the determined operating elements, are provided. The selection of the service function then takes place depending on the operating element operated during the operating input and depending on the converter data.Type: GrantFiled: October 30, 2015Date of Patent: September 4, 2018Assignee: Audi AGInventor: Stefan Sellschopp
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Patent number: 10064335Abstract: A controller for an unloading system. The unloading system comprises an unloading vehicle having an unloading apparatus and a collection vehicle having a container. The unloading apparatus is configured to direct material to the container driven in the vicinity of the unloading vehicle. The controller is configured to: receive image data representative of at least a portion of the container; receive a path information signal representative of a path that is to be followed by the unloading vehicle or the collection vehicle; and set an attribute of the unloading apparatus, the unloading vehicle, or the collection vehicle in accordance with the image data and the path information signal in order to direct the material from the unloading apparatus to the container.Type: GrantFiled: October 28, 2014Date of Patent: September 4, 2018Assignee: CNH Industrial America LLCInventors: Ward M. R. Byttebier, Bernard E. D. Depestel, Pieter Vanysacker, Karel M. C. Viaene
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Patent number: 10067797Abstract: A method and an apparatus for a parallel computing program calling APIs (application programming interfaces) in a host processor to perform a data processing task in parallel among compute units are described. The compute units are coupled to the host processor including central processing units (CPUs) and graphic processing units (GPUs). A program object corresponding to a source code for the data processing task is generated in a memory coupled to the host processor according to the API calls. Executable codes for the compute units are generated from the program object according to the API calls to be loaded for concurrent execution among the compute units to perform the data processing task.Type: GrantFiled: September 26, 2016Date of Patent: September 4, 2018Assignee: Apple Inc.Inventors: Aaftab Munshi, Nathaniel Begeman
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Patent number: 10069498Abstract: A packaged VCTCXO may include a crystal oscillator configured to output a signal of a particular frequency and a temperature sensor configured to measure an internal temperature of the crystal oscillator. In addition, the packaged VCTCXO may include a microcontroller configured to generate an internal control voltage signal based at least in part on the temperature and an external control voltage received by the packaged VCTCXO. Moreover, the packaged VCTCXO may include a combiner configured to combine an internal control voltage and the external control voltage to generate a control voltage. Further, the control voltage may be supplied to the crystal oscillator to cause the crystal oscillator to generate the signal of the particular frequency.Type: GrantFiled: May 30, 2017Date of Patent: September 4, 2018Assignee: Greenray Industries, Inc.Inventor: Jonathan George Scott
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Patent number: 10068624Abstract: According to an embodiment, a storage device may be provided. The storage device may include a semiconductor memory device, and a memory controller configured for controlling the semiconductor memory device. The semiconductor memory device may include a memory unit including a plurality of memory chips. The semiconductor memory device may include an interface chip realigning serial data received from the memory controller into parallel data and transferring the parallel data to each of the plurality of memory chips.Type: GrantFiled: September 13, 2017Date of Patent: September 4, 2018Assignee: SK hynix Inc.Inventor: Kyoung Han Kwon
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Patent number: 10068028Abstract: Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for verifying deep links in for a native application. In one aspect, a method includes verify a deep link for a first version level of a native application and serving the deep link only if aversion level of a native application installed on a requesting user device is the same as or subsequent to the version level for which the deep link is verified.Type: GrantFiled: February 14, 2017Date of Patent: September 4, 2018Assignee: Google LLCInventor: Erik Hendriks
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Patent number: 10068864Abstract: An embodiment of the invention may include a semiconductor structure, and method of forming the semiconductor structure. The semiconductor structure may include a first set of pillars located on a first substrate. The semiconductor structure may include a second set of pillars located on a second substrate. The semiconductor structure may include a joining layer connecting the first pillar to the second pillar. The semiconductor structure may include an underfill layer located between the first and second substrate.Type: GrantFiled: March 8, 2017Date of Patent: September 4, 2018Assignee: International Business Machines CorporationInventors: Charles L. Arvin, Jeffrey P. Gambino, Christopher D. Muzzy, Wolfgang Sauter
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Patent number: 10068561Abstract: An electronic signal processor for processing signals includes a complex first filter, one or more gain stages and a second filter. The first filter is characterized by a frequency response curve that includes multiple corner frequencies, with some corner frequencies being user selectable. The first filter also has at least two user-preset gain levels which may be alternately selected by a switch. Lower frequency signals are processed by the first filter with at least 12 db/octave slope, and preferably with 18 db/octave slope to minimize intermodulation distortion products by subsequent amplification in the gain stages. A second filter provides further filtering and amplitude control. The signal processor is particularly suited for processing audio frequency signals.Type: GrantFiled: February 21, 2017Date of Patent: September 4, 2018Inventor: Jeffrey Arnold
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Patent number: 10067685Abstract: Systems and methods are disclosed for identifying disk drives and processing data access requests. A disk drive may be identified as an Advanced Host Controller Interface (AHCI) drive, a Non-Volatile Memory Express (NVME) drive, and/or an ATA packet interface (ATAPI) drive. Data access requests for the disk drive may be translated to NVME commands, AHCI commands, or ATAPI commands, based on whether the drive is identified as a NVME drive, an AHCI drive, and/or an ATAPI drive.Type: GrantFiled: October 16, 2017Date of Patent: September 4, 2018Assignee: Western Digital Technologies, Inc.Inventor: John E. Maroney
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Patent number: 10067699Abstract: A method, computer program product, and/or system for performing a selection of a plurality of auxiliary storage sites in a multi-target environment in preparation for a hyper exchange are/is provided. To perform the selection, a failure is first detected with respect to a primary storage site in the multi-target environment. Then, aggregate weights are determined based on a management policy for the plurality of auxiliary storage sites. In turn, an auxiliary storage site with a first aggregate weight is selected from the plurality of auxiliary storage sites. With the auxiliary storage site selected, the hyper exchange of a plurality of systems in a multi-target environment in response to the failure is triggered from the primary storage site to the auxiliary storage site with the first aggregate weight.Type: GrantFiled: December 13, 2017Date of Patent: September 4, 2018Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Tariq Hanif, William J. Rooney
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Patent number: 10067493Abstract: A frequency control method for use in a frequency control system including: a server that receives, from a power system operator, a power command for controlling a frequency of a power grid within a predetermined frequency; at least one distributed energy resource; and a local controller connected to the server through a communication network and to the at least one distributed energy resource, the frequency control method includes: receiving the power command from the power system operator; obtaining a frequency measurement of the power grid; predicting a next power command using the frequency measurement, before the next power command is received from the power system operator; and controlling an input or output of the at least one distributed power energy resource using the predicted next power command, before the next power command is received from the power system operator.Type: GrantFiled: February 26, 2014Date of Patent: September 4, 2018Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.Inventors: Hoday Stearns, Kenichi Watanabe, Mitsuru Kaji
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Patent number: 10069692Abstract: Various embodiments relate to an electronic device and method for providing information. The electronic device receives status information of an external device and then displays a combination of the received status information and stored user information, e.g., phonebook, of the external device. The external device creates or updates the status information thereof and delivers the created or updated status information to the electronic device. The electronic device displays the received status information of the external device on a specific region.Type: GrantFiled: November 11, 2016Date of Patent: September 4, 2018Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Yongjoon Jeon, Junghun Kim, Jihyun Kim
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Patent number: 10068543Abstract: A unit shift register circuit constitutes each stage of a shift register circuit. The unit shift register circuit includes an output transistor (T1) configured to input a prescribed clock signal (CK) to a drain terminal, and output an output signal (OUT) from a source terminal. The unit shift register circuit includes a setting transistor (T2) in which a source terminal is connected to a gate electrode of the output transistor (T1), is configured to input an input signal (S) to the drain terminal, and is configured to input to a gate electrode an input signal (VS) in a case of charging a gate electrode (node (VC)) of the output transistor (T1). The input signal (VS) having a voltage higher than that of the input signal (S).Type: GrantFiled: February 25, 2014Date of Patent: September 4, 2018Assignee: Sharp Kabushiki KaishaInventors: Kaoru Yamamoto, Yasuyuki Ogawa
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Image processing apparatus, imaging apparatus, image processing program, and image processing method
Patent number: 10063827Abstract: An image processing apparatus for performing image processing for image data. The image processing apparatus includes a signal separation unit configured to separate a color signal and a luminance signal included in the image data, and a color signal control unit configured to control chroma of the color signal used for the image processing based on a luminance value of the luminance signal.Type: GrantFiled: March 16, 2015Date of Patent: August 28, 2018Assignee: Ricoh Company, Ltd.Inventor: Toshiyuki Kawasaki -
Patent number: 10060112Abstract: We disclose a toilet system which analyzes solid waste to detect tags which were associated with pharmaceutical or nutritional products and excreted in the solid waste of a user. The toilet system may include a receptacle for receiving solid waste, a liquid dispenser for providing a liquid to assist in dispersing the solid waste, a solid waste dispersing system which may mix the solid waste with the liquid thereby homogenizing the solid waste, and an electromagnetic signature detector which may analyze the tags in the solid waste. The electromagnetic signature detector may include a selective binding surface which may bind tags present in the solid waste and which may be connected to a transducer which senses the presence of bound tags.Type: GrantFiled: June 1, 2017Date of Patent: August 28, 2018Inventors: David R. Hall, Steven J. M. Butala, Dan Allen, Andrew Nguyen, Conrad Rosenbrock, Ben Swenson, Daniel Hendricks, Travis Niederhauser, John Christensen, Joshua Larsen, Joe Fox
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Patent number: 10061815Abstract: A disclosed computer-implemented method for displaying search results may include (1) receiving a query to search a document database that stores a document family containing a parent document and a child document embedded within the parent document, (2) in response to receiving the search query, identifying (a) an individual relevance score that quantifies the relevance of the parent document to the search query and (b) a family relevance score that quantifies the overall relevance of the entire document family to the search query, and (3) simultaneously depicting both the individual relevance score and the family relevance score in response to the search query. Various other methods, systems, and computer-readable media are also disclosed.Type: GrantFiled: October 3, 2014Date of Patent: August 28, 2018Assignee: Veritas Technologies LLCInventors: Michael Coyle, Terence Chang, Anil Khadka, Nelson Wiggins
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Patent number: 10062448Abstract: A circuit includes a fuse cell with a current mirror. The first leg of the current minor includes first and second N-type transistors coupled in series between the upper and lower rails and the second leg includes third and fourth N-type transistors coupled in series between the upper and lower rails. The size of the first N-type transistor is (Y·A1), the second N-type transistor is (X·A2), the third N-type transistor is (X·A1) and the fourth N-type transistor is (Y·A2) where X and Y are integers and A1 and A2 are the sizes of respective reference transistors. A fuse has a first terminal coupled between the first and second N-type transistors and a second terminal coupled between the third and fourth N-type transistors; a first control node on the second leg of the current minor is coupled to control the voltage at an output node of the fuse cell.Type: GrantFiled: November 7, 2017Date of Patent: August 28, 2018Assignee: Texas Instruments IncorporatedInventors: Hector Torres, Mark Bryan Hamlyn
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Patent number: 10063182Abstract: Provided is a hybrid power generating device. The hybrid power generating device includes a solar cell configured to generate an electric energy using sunlight; an electrostatic generating device configured to generate an electric energy using static electricity; and a rectifier configured to electrically connect the electric energy generated by the solar cell to the electric energy generated by the electrostatic generating device.Type: GrantFiled: January 6, 2015Date of Patent: August 28, 2018Assignee: Research & Business Foundation Sungkyunkwan UniversityInventors: Sangwoo Kim, Gyu-cheol Yoon, Keun Young Lee, Kyung Sik Shin, Seongsu Kim
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Patent number: 10061284Abstract: Methods are provided for solid free-form fabrication of an article without using a slice stack file quickly and efficiently—in terms of computational resources—converting STL files representing an article or articles to be built by SFFF without the use of a conventional slicing program. An application program interface (“API”) is used to generate a bitmap corresponding to each particular layer of the article that is to be printed directly from the article's STL file. This conversion may done essentially in real time immediately before the particular layer is to be printed. The bitmap is used in configuring the printing instructions for the SFFF printing mechanism to print that particular layer.Type: GrantFiled: March 19, 2015Date of Patent: August 28, 2018Assignee: The ExOne CompanyInventors: Daniel T. Brunermer, Patrick Stack, Lawrence Joseph Voss
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Patent number: 10061542Abstract: Aspects of a memory and method for accessing the memory are disclosed. The memory includes a plurality of memory cells configured to support a read and write operation in a memory cycle in a first mode and a write only operation in the memory cycle in a second mode. The memory further includes a control circuit configured to generate a read clock for the read operation and a write clock for the write operation. The timing of the write clock is a function of the timing of the read clock in the first mode, and the timing of the memory cycle in the second mode.Type: GrantFiled: September 15, 2015Date of Patent: August 28, 2018Assignee: QUALCOMM IncorporatedInventors: Tony Chung Yiu Kwok, Nishith Nitin Desai, Changho Jung