Patents Examined by Tyler J Pereny
  • Patent number: 11967852
    Abstract: An example device includes a power regulator to provide electrical power to a wireless charger over a power line and a controller connected to the power regulator. The controller is to generate a signal that encodes an allowable power draw of the wireless charger and communicate the signal to the power regulator. The power regulator communicates the signal with the electrical power transmitted over the power line to the wireless charger.
    Type: Grant
    Filed: July 21, 2022
    Date of Patent: April 23, 2024
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Kuo-Hsien Liu, Jerome Arnaud Antoine Bove, Isaac Lagnado
  • Patent number: 11968761
    Abstract: A control device configured for use in a load control system to control an electrical load external to the control device may comprise an actuation member having a front surface defining a capacitive touch surface configured to detect a touch actuation along at least a portion of the front surface. The control device includes a main printed circuit board (PCB) comprising a control circuit, a tactile switch, a controllably conductive device, and a drive circuit operatively coupled to a control input of the controllably conductive device for rendering the controllably conductive device conductive or non-conductive to control the amount of power delivered to the electrical load. The control device also includes a capacitive touch PCB that comprises a touch sensitive circuit comprising one or more receiving capacitive touch pads located on the capacitive touch PCB and arranged in a linear array adjacent to the capacitive touch surface.
    Type: Grant
    Filed: April 24, 2023
    Date of Patent: April 23, 2024
    Assignee: Lutron Technology Company LLC
    Inventor: Dinesh Sundara Moorthy
  • Patent number: 11953527
    Abstract: A peak detector comprises multiple small-size amplitude detection circuits coupled in parallel to signal inputs at which a signal is received from a VCO. Each amplitude detection circuit generates a voltage on an output, indicating a voltage peak or amplitude of a first signal input and a second signal input (specifically, differential output of VCO). At a given time, only one small-size amplitude detection circuit is activated to load VCO, reducing the impact on LC resonant frequency. The plurality of small-size detection circuits work sequentially, and an automatic averaging of their outputs can significantly improve the peak detector fluctuation (caused by process variation and device mismatch) compared to each single small-size amplitude detection circuit.
    Type: Grant
    Filed: August 24, 2022
    Date of Patent: April 9, 2024
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Ping Lu, Shaishav A. Desai, Minhan Chen
  • Patent number: 11955546
    Abstract: A semiconductor device includes first and second electrodes, a semiconductor part therebetween, first to third control electrodes inside the semiconductor part, and first to third interconnects. The first and second control electrodes are arranged along a front surface of the semiconductor part. The third control electrodes are provided between the first electrode and the first and second electrodes, respectively. The first and second interconnect are electrically connected to the first and second control electrodes, respectively. The third interconnect is electrically connected to the third control electrodes. The semiconductor layer includes first and third layers of a first conductivity type and a second layer of a second conductivity type. The second layer is provided between the first layer and the second electrode. The third layer is provided between the second layer and the second electrode. The second layer faces the first and second control electrodes via insulating portions.
    Type: Grant
    Filed: September 8, 2020
    Date of Patent: April 9, 2024
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices and Storage Corporation
    Inventors: Takeshi Suwa, Tomoko Matsudai, Yoko Iwakaji
  • Patent number: 11949410
    Abstract: A system includes control circuitry configured to control an output signal. The control circuitry and/or various other sources of undesirable signal components may corrupt the control signal used by the control circuitry to correct the output signal. Conditioning circuitry may effect current-domain repair on the control circuitry by providing feedback-based conditioning actuation, including comparator overdrive, to the control circuitry.
    Type: Grant
    Filed: October 24, 2022
    Date of Patent: April 2, 2024
    Assignee: The Regents of the University of Michigan
    Inventors: Al-Thaddeus Avestruz, Xiaofan Cui
  • Patent number: 11942941
    Abstract: A device including a first supply voltage track, a second supply voltage track, a first reference track, a first standard cell, and a second standard cell. The first supply voltage track is configured to provide a first voltage and the second supply voltage track is configured to provide a second voltage that is greater than the first voltage. The first standard cell is configured to be electrically connected to the first supply voltage track to receive the first voltage and electrically connected to the first reference track. The second standard cell is configured to be electrically connected to the second supply voltage track to receive the second voltage and electrically connected to the first reference track.
    Type: Grant
    Filed: July 26, 2022
    Date of Patent: March 26, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Hung-Chih Ou, Wen-Hao Chen
  • Patent number: 11936374
    Abstract: Methods and devices for reading and programming a state of a switch device are presented. Reading of the state is provided by measuring a resistance of the switch via injection of a current. If a measured resistance does not correspond to a resistance of an expected state, then the switch is reprogrammed, and the state reread. The switch device may form part of a complex switch circuit that includes a combination of shunt and through switch devices. Currents injected into external loads coupled to the switch circuit increase accuracy in reading of the state. Further accuracy in reading of the state of a through switch device is provided by provision of a bypass path to a shunt switch device. The complex switch circuit may be implemented as a SPDT switch including two branches, each branch including a shunt and a through switch device. Several types of switch devices, such as phase-change material (PCM) devices may be implemented.
    Type: Grant
    Filed: September 23, 2022
    Date of Patent: March 19, 2024
    Assignee: PSEMI CORPORATION
    Inventors: Jeffrey A. Dykstra, Jaroslaw Adamski, Smita Kanikaraj, Douglas Lacy
  • Patent number: 11936351
    Abstract: System and method for error amplification and processing. For example, the system includes: a signal processing unit configured to receive a reference signal and a feedback signal and generate a digital pulse signal, a frequency of the digital pulse signal being associated with a difference between the reference signal and the feedback signal; a counter configured to receive the digital pulse signal and generate a counter output signal based on at least information associated with the digital pulse signal; and a digital-to-analog converter configured to receive the counter output signal and generate an output signal based on at least information associated with the counter output signal.
    Type: Grant
    Filed: January 13, 2021
    Date of Patent: March 19, 2024
    Assignee: On-Bright Electronics (Shanghai) Co., Ltd.
    Inventors: Yaozhang Chen, Xiangkun Zhai, Liqiang Zhu, Lieyi Fang
  • Patent number: 11923827
    Abstract: Disclosed is a Bulk Acoustic Wave (BAW) assist filter structure with a BAW resonator stacked onto an integrated passive device (IPD). In exemplary aspects disclosed herein, the BAW filter structure includes a transducer with electrodes and a piezoelectric layer between the electrodes. The IPD is electrically coupled to the BAW resonator and provides a high frequency of operation. In such a configuration, the BAW assist filter structure has a low insertion loss and mitigates electrical length parasitic loss due to the close electrically proximity of the BAW resonator stacked onto the IPD. Further, the BAW assist filter structure is able to filter high frequencies and provides improved filter performance and greater flexibility in design of a filter transfer function.
    Type: Grant
    Filed: February 23, 2021
    Date of Patent: March 5, 2024
    Assignee: Qorvo US, Inc.
    Inventors: Jeffery D. Galipeau, Kelly M. Lear
  • Patent number: 11923851
    Abstract: According to one embodiment, a drive device includes a drive circuit configured to drive a semiconductor device. The semiconductor device includes first to fourth electrodes, a semiconductor member, and an insulating member. The semiconductor member includes first to fourth semiconductor region. The first semiconductor region includes first to third partial regions. The first semiconductor region is between the first electrode and the second semiconductor region. The third semiconductor region is between the first and second semiconductor regions. The fourth semiconductor region is between the first electrode and the first semiconductor region. The second electrode is electrically connected to the second semiconductor region. The first partial region is between the fourth semiconductor region and the third electrode. The second partial region is between the fourth semiconductor region and the fourth electrode.
    Type: Grant
    Filed: July 12, 2022
    Date of Patent: March 5, 2024
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Tatsunori Sakano, Ryohei Gejo, Tomoko Matsudai
  • Patent number: 11909393
    Abstract: An input/output circuit including: a pull-up driving circuit including at least one internal node coupled to a pad, the pull-up driving circuit configured to pull up a voltage of the pad to a Tx power supply voltage; and a pull-down driving circuit configured to pull down the voltage of the pad to a ground voltage. The pull-up driving circuit is configured to set a voltage level of the at least one internal node to a voltage level of a power supply voltage on the basis of a fixed voltage, when a voltage difference between the Tx power supply voltage and the voltage of the pad is greater than the voltage level of the power supply voltage.
    Type: Grant
    Filed: June 6, 2022
    Date of Patent: February 20, 2024
    Assignee: SK hynix Inc.
    Inventor: Gyu Nam Kim
  • Patent number: 11899485
    Abstract: A line driver includes a first resistive component, a second resistive component, an operational amplifier and an adjustable current mirror array circuit. A first terminal of the second resistive component and the first resistive component are coupled to a node, and a second terminal of the second resistive component is coupled to an output terminal. The operational amplifier receives a common mode voltage through the first resistive component, and generates a first signal and a second signal according to the common mode voltage and an input signal. The adjustable current mirror array circuit generates a first current to the node and a second current to the output terminal in response to the first and second signals, and adjusts a ratio of the second current to the first current in response to multiple control bits so as to set an output impedance of the output terminal.
    Type: Grant
    Filed: December 12, 2022
    Date of Patent: February 13, 2024
    Assignee: SIGMASTAR TECHNOLOGY LTD.
    Inventors: Zhun Chen, Zhong-Yuan Wan
  • Patent number: 11881714
    Abstract: Various aspects of the present disclosure generally relate to wireless communication. In some aspects, a user equipment (UE) may receive an indication of one or more parameters associated with management of multiple antenna groups of the UE for use in energy harvesting. The UE may transmit or receive signaling based at least in part on the one or more parameters of the multiple antenna groups of the UE. Numerous other aspects are described.
    Type: Grant
    Filed: February 28, 2022
    Date of Patent: January 23, 2024
    Assignee: QUALCOMM Incorporated
    Inventors: Ahmed Attia Abotabl, Ahmed Elshafie, Muhammad Sayed Khairy Abdelghaffar, Abdelrahman Mohamed Ahmed Mohamed Ibrahim
  • Patent number: 11876505
    Abstract: An acoustic wave filter device includes first and second terminals, a longitudinally coupled resonator coupled between the first terminal and the second terminal, and an inductor connected between a path and a ground potential, the path connecting the first terminal and the longitudinally coupled resonator to each other. The longitudinally coupled resonator includes at least one first IDT electrode coupled to the first terminal, and at least one second IDT electrode connected to the second terminal. A total capacitance value of the at least one first IDT electrode is smaller than a total capacitance value of the at least one second IDT electrode.
    Type: Grant
    Filed: February 9, 2021
    Date of Patent: January 16, 2024
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Kenichi Uesaka
  • Patent number: 11863187
    Abstract: A circuit is provided. The circuit includes a first master stage, a second master stage, a first slave stage, a first slave stage, and a second slave stage. The first master stage includes a data input line. The second master stage includes an inverse data input line. The first slave stage is coupled to an output of the first master stage. The second slave stage is coupled to an output of the second master stage. The first slave stage generates an output signal during a rising edge of a clock cycle. The second slave stage generates an inverted output signal during the rising edge of the clock cycle. The output signal and the inverted output signal are available concurrently.
    Type: Grant
    Filed: June 3, 2022
    Date of Patent: January 2, 2024
    Assignee: Synopsys, Inc.
    Inventors: Pradip Jadhav, Michael McManus
  • Patent number: 11843382
    Abstract: A circuit includes an input circuit, a level shifter circuit and an output circuit. The input circuit is coupled to a first voltage supply, and configured to receive a first input signal, and to generate at least a second or a third input signal. The level shifter circuit is coupled to the input circuit and a second voltage supply, and configured to receive a first enable signal, the second or third input signal, and to generate a first signal responsive to the first enable signal, the second input signal or the third input signal. The level shifter circuit includes a header circuit coupled to a first node, and is configured to enable or disable the level shifter circuit responsive to the first enable signal. The output circuit is coupled to at least the level shifter circuit and the second voltage supply, and is configured to generate an output signal.
    Type: Grant
    Filed: May 4, 2022
    Date of Patent: December 12, 2023
    Assignees: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., TSMC NANJING COMPANY, LIMITED, TSMC CHINA COMPANY, LIMITED
    Inventors: Jing Ding, Zhang-Ying Yan, Qingchao Meng, Lei Pan
  • Patent number: 11837968
    Abstract: An apparatus converts an AC power panel into a persistent DC power panel with a persistent power switch. The persistent power switch includes a removable power unit for coupling to the AC power switch in order to convert the AC power panel into a persistent DC power panel. The removable power unit can be mounted in the power panel or can be implemented as a stand-alone external device for connecting to the power panel.
    Type: Grant
    Filed: August 13, 2021
    Date of Patent: December 5, 2023
    Assignee: Entrantech Inc.
    Inventor: Kong-Chen Chen
  • Patent number: 11831306
    Abstract: According to an example, an electronic device includes a component, a supply line providing a supply voltage, a transistor with a control input, a linear first control loop, and a non-linear second control loop. The transistor outputs an output voltage to the component depending on a signal applied to the control input. The linear first control loop includes an ADC to convert an analog output voltage level into a digital measurement signal, a controller to generate a digital control signal for the transistor depending on the digital measurement signal, and a DAC to convert the digital control signal into a first analog control signal. The non-linear second control loop is configured to generate a second analog control signal depending on the analog output voltage level. The second analog control signal is superimposed with the first analog control signal and the combined control signals are fed to the control input of the transistor.
    Type: Grant
    Filed: June 9, 2022
    Date of Patent: November 28, 2023
    Assignee: Infineon Technologies AG
    Inventors: Mihail Jefremow, David Zipperstein, Juergen Schaefer, Holger Dienst, Markus Bichl, Ralph Mueller-Eschenbach, Arndt Voigtlaender
  • Patent number: 11824369
    Abstract: A wireless power transmission system includes a transmission line, one end of which is connected to a power reception unit configured to receive AC power, a splitting unit, one end of which is connected to an other end of the transmission line and an other end of which is split into a plurality of transmission lines, a first rectification unit connected to a second transmission line of the splitting unit, and a second rectification unit connected to a third transmission line. A transmission line length of the second transmission line and a transmission line length of the third transmission line are each substantially equal to one fourth of a wavelength of the AC power.
    Type: Grant
    Filed: October 22, 2021
    Date of Patent: November 21, 2023
    Assignee: Canon Kabushiki Kaisha
    Inventor: Koji Yukimasa
  • Patent number: 11824524
    Abstract: A semiconductor device includes a first transistor that flows a load current to an external load; a current generation circuit that outputs a current corresponding to a power consumption generated in an overheat detection target when the load current flows the overheat detection target; a resistor-capacitor-network comprising a resistor and a capacitor corresponding to a thermal resistance and a thermal capacitance of the overheat detection target, and having one end coupled to the current generation circuit; an overheat detection circuit coupled to a connection point of the current generation circuit and the resistor-capacitor-network; and a voltage source that sets a voltage of the connection point of the current generation circuit and the resistor-capacitor-network to a predetermined voltage.
    Type: Grant
    Filed: March 30, 2022
    Date of Patent: November 21, 2023
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Hiroki Nagatomi, Makoto Tanaka