Patents Examined by Upendra Roy, III
  • Patent number: 4788156
    Abstract: One embodiment of a process in accordance with our invention includes the step of forming a P type region on a semiconductor substrate. After the P type region is formed, an N type layer is epitaxially grown on the P type region. A Schottky gate is then formed on the N type epitaxial layer. A first portion of the epitaxial layer serves as a transistor source, a second portion of the epitaxial layer serves as the transistor drain, and a third portion of the epitaxial layer serves as the channel. Of importance, the P type semiconductor region helps prevent various short channel effects caused when current carriers flowing between the source and drain flow too far from the Schottky gate.
    Type: Grant
    Filed: September 24, 1986
    Date of Patent: November 29, 1988
    Assignee: Microwave Technology, Inc.
    Inventors: Edward B. Stoneham, Masahiro Omori, Arthur D. Herbig
  • Patent number: 4771012
    Abstract: A method of fabricating a field effect transistor, wherein impurity diffusion layers of source and drain are formed by an ion implantation method using the gate electrode as the mask by inclining the semiconductor substrate with respect to the ion beam incident direction so as to prevent the channeling effect and also rotating it in planarity with respect to the ion beam scanning plane. As a result, impurity diffusion layers can be formed symmetrically with respect to the gate electrode.
    Type: Grant
    Filed: June 12, 1987
    Date of Patent: September 13, 1988
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Toshiki Yabu, Michihiro Inoue, Takashi Ozone