Patents Examined by V. D. Dang
  • Patent number: 4664944
    Abstract: An improved deposition method for producing silicon carbide high-temperature semiconductor material comprising placing a semiconductor substrate composed of silicon carbide in a fluidized bed silicon carbide deposition reactor, fluidizing the bed particles by hydrogen gas in a mildly bubbling mode through a gas distributor and heating the substrate at temperatures around 1200.degree.-1500.degree. C. thereby depositing a layer of silicon carbide on the semiconductor substrate.
    Type: Grant
    Filed: January 31, 1986
    Date of Patent: May 12, 1987
    Assignee: The United States of America as represented by the United States Department of Energy
    Inventors: George C. Hsu, Naresh K. Rohatgi
  • Patent number: 4659650
    Abstract: A positive resist containing a weak base and polyvinyl phenol as a film forming component is deposited on a substrate, subsequently exposed imagewise, cured, blanket exposed and developed in a KOH solution at temperatures of less than 10.degree. C. The resist pattern thus obtained is exposed to light having a wavelength ranging from 300 to 320 nm and finally heat-treated at temperatures ranging from 150.degree. to 280.degree. C. The finished lift-off mask is dimensionally stable at temperatures of .ltoreq.280.degree. C. and does not emit liquid or volatile components when heated.During application of the lift-off mask, a material is blanket vapor deposited at a substrate temperature ranging from about 160.degree. to 250.degree. C. on the resist pattern having openings with overhanging walls. Subsequently, the resist pattern is dissolved in a sodium metasilicate solution, causing the material vapor deposited thereon to be lifted off, with the material deposited on the substrate directly remaining.
    Type: Grant
    Filed: March 17, 1986
    Date of Patent: April 21, 1987
    Assignee: International Business Machines Corporation
    Inventors: Holger Moritz, Gerd Pfeiffer
  • Patent number: 4656055
    Abstract: A three part edge seal for an integrated circuit semiconductor chip is disclosed. The edge seal includes two separate layers of metal one of which overlays the other in electrical contact. One of the metal layers is in ohmic contact with a highly doped region formed in the planar surface of the semiconductor body. The two metal layers serve as an electrical conductor to distribute power to various portions of the integrated circuit contained in the chip and electrically charge the highly doped region to prevent migration of ions into the active areas of the integrated circuits.
    Type: Grant
    Filed: April 18, 1986
    Date of Patent: April 7, 1987
    Assignee: RCA Corporation
    Inventor: Robert A. Dwyer