Patents Examined by Vangelis Economou
-
Patent number: 4710797Abstract: An EPROM device is constituted by an IC lead frame having an island area and a plurality of lead wires, an EPROM IC chip mounted in the island area of the frame, a plurality of wirings, each connecting the bonding pad of the IC chip to one of the lead wires, a layer of silicone resin material formed on the upper surface of the IC chip, a window plate placed on the surface of the silicone resin layer for transmitting ultraviolet rays and bonded to the silicone resin layer, and a molded package of epoxy resin encapsulating the chip island area, the EPROM chip and the silicone resin layer so as to expose the upper surface of the window plate.Type: GrantFiled: March 7, 1984Date of Patent: December 1, 1987Assignee: Oki Electric Industry Co., Ltd.Inventor: Seietsu Tanaka
-
Patent number: 4646130Abstract: A semiconductor element is provided as an electrically tested, economical, ong time storable and simple individual element for easy assembly and universal application. A semiconductor disk and an insulating body annularly surrounding the semiconductor disk are used. The insulating body is furnished with a recess substantially adapted to the edge zone of the semiconductor disk and which is also formed in the regions adjacent to the recess for a concentric disposition of contacting components on the two sides of the semiconductor disk. The semiconductor disk is supported and embedded at its edge zone in the recess of the insulating body. In case of a semiconductor disk with a gate electrode the gate current conductor is led through the insulating body and is then formed as a spring body with a rotatable and curved end piece for pressure contacting the gate electrode.Type: GrantFiled: March 8, 1984Date of Patent: February 24, 1987Assignee: Semikron Gesellschaft fur Gleichrichterbau und Elektronik m.b.H.Inventor: Helmut Creutz
-
Patent number: 4632507Abstract: A device for joining an underwater optical fiber cable and a repeater comprising a fiber feed-in cable, the end of said underwater cable being secured in a jointing block by means of a tapered ferrule and hard-setting resin filler, said device comprising a slack chamber for storing surplus lengths of optical fiber, said slack chamber interior being bounded on the underwater-cable-side by a storage canister having a bulged internal wall the radius of curvature whereof is everywhere greater than or equal to the minimum acceptable radius of curvature for the optical fibers, and on the fiber-feed-cable-side by a plug having a conical internal surface. Device is mainly applicable to the joining of undersea telecommunications cables.Type: GrantFiled: September 11, 1984Date of Patent: December 30, 1986Assignee: Les Cables de LyonInventors: Georges Mignien, Didier Fasquel
-
Patent number: 4630888Abstract: In a multiple joint for underwater optical fiber cables, a first cable termination terminates at least one cable and incorporates a storage chamber for excess lengths of fiber. A connecting member is fastened to the end of said at least one cable, and a first reinforcing member laterally surrounds the first cable termination. A second cable termination terminates at least two parallel cables and incorporates a common connecting member fastened to the ends of each cable, a watertight member adapted to close it off and passages in this watertight member for respective fibers of the cables. There is a storage chamber for excess lengths of fiber on the outside of this watertight member, and a second reinforcing member laterally surrounds the second cable termination. An access cable incorporates fibers from the storage chamber in the first cable termination welded to fibers from the storage chamber in the second cable termination.Type: GrantFiled: June 15, 1984Date of Patent: December 23, 1986Assignee: Les Cables de LyonInventor: Thierry Dubar
-
Patent number: 4630096Abstract: An electronic module having a high density of silicon IC chips is provided by mounting the chips in tapered through-holes in a silicon substrate, filling the edge gaps between the chips and the substrate with a glass so that the chips, the filler glass, and the substrate have a smooth upper surface adapted to receive monolithic interconnections formed by planar metallization methods. The resulting assembly is enclosed in a housing also formed substantially from silicon, which contains electrically isolated pins for contacting the input-output electrodes of the assembly. Preferential etching is used to form the through-holes in the substrate as well as various alignment means on the substrate and other parts of the housing so that they are self-aligning during assembly. Improved performance, reliability, and low cost is obtained.Type: GrantFiled: May 30, 1984Date of Patent: December 16, 1986Assignee: Motorola, Inc.Inventors: James E. Drye, Jack A. Schroeder, Vern H. Winchell, II
-
Patent number: 4626885Abstract: A photosensor including a transparent electrode for transmitting incident light and a photoconductive layer receiving light from the transparent electrode for performing photoelectric conversion, is disclosed in which the photoconductive layer is made of amorphous silicon, the amorphous silicon contains 5 to 30 atomic percent hydrogen and is doped with at least one selected from elements belonging to the groups II and III in such a manner that a region remote from the transparent electrode is higher in the concentration of the selected element than another region proximate to the transparent electrode, and a voltage is applied across the photoconductive layer so that a surface of the photoconductive layer facing the transparent electrode is at a positive potential with respect to another surface of the photoconductive layer opposite to the surface facing the transparent electrode.Type: GrantFiled: July 29, 1983Date of Patent: December 2, 1986Assignee: Hitachi, Ltd.Inventors: Sachio Ishioka, Yoshinori Imamura, Tsuyoshi Uda, Yukio Takasaki, Chushirou Kusano, Hirofumi Ogawa, Tatsuo Makishima, Tadaaki Hirai
-
Patent number: 4625229Abstract: The invention relates to an arrangement for an electronic component operable at low temperatures, in particular, to a radiation sensitive semiconductor component. The arrangement consists of a housing for the component and of a cooler which is in communication with the housing and operates in accordance with the Joule-Thomson effect. The invention consists in that there is arranged between the cooler and the adjacent housing wall a super-insulation comprised of a single- or multi-layered foil with low thermal conductivity and capacity and high thermal-transfer resistance.Type: GrantFiled: October 12, 1984Date of Patent: November 25, 1986Assignee: Telefunken Electronic GmbHInventor: Horst Maier
-
Patent number: 4621279Abstract: The invention relates to a housing for opto-electronic components, with the semiconductor component being cooled by a cooler which operates in accordance with the Joule-Thomson effect and is in communication with the housing. The gist of the invention is that the non-evacuation housing comprises several sections, with the first section of the housing which is in direct communication with the cooler having a low thermal conductivity and a low thermal capacity, whereas the end section of the housing containing a radiation transmitting window has a high thermal conductivity and a high thermal capacity.Type: GrantFiled: October 12, 1984Date of Patent: November 4, 1986Assignee: Telefunken Electronic GmbHInventors: Horst Maier, Gottfried Pahler
-
Patent number: 4618879Abstract: A semiconductor device includes a semiconductor chip, a package for housing the semiconductor chip, and wires for bonding one of a plurality of electrodes formed on the semiconductor chip and one of a plurality of electrodes formed on the package. Each of the wires has a portion rising at a steep angle with respect to one of the electrodes to be bonded and a portion descending at a gentle angle with respect to the other of the electrodes to be bonded. The rising portion and the descending portion of each wire are disposed in reverse positions with respect to the rising portion and the descending portion of the adjacent wires.Type: GrantFiled: April 18, 1984Date of Patent: October 21, 1986Assignee: Fujitsu LimitedInventors: Masataka Mizukoshi, Teiichi Endo
-
Patent number: 4614964Abstract: A semiconductor package including a first electrically conductive bus and a second electrically conductive bus spaced from and generally surrounding the first bus in approximately concentric relation thereto. A plurality of generally equally angularly spaced semiconductors are located in the space between the buses and each semiconductor has at least two electrodes. One electrode of each semiconductor is connected to the first bus and the other electrode is connected to the second bus.Type: GrantFiled: August 15, 1984Date of Patent: September 30, 1986Assignee: Sundstrand CorporationInventor: Thomas Sutrina
-
Patent number: 4612566Abstract: Disclosed is a microwave transistor mounting structure which comprises a chassis formed with raised portions, a substrate formed with a hole, and a microwave transistor, the raised portions of the chassis being engaged with the hole of the substrate, the grounding terminals of the microwave transistor being mounted on the raised portions, and the other terminals of the microwave transistor being mounted on the substrate.Type: GrantFiled: November 26, 1984Date of Patent: September 16, 1986Assignee: Alps Electric Co., Ltd.Inventors: Masakatsu Kowata, Torao Hiyama
-
Patent number: 4607275Abstract: A disk-shaped housing for a semiconductor element comprising a cup (1) of insulating material with an opening (2) at the bottom. Through this opening (2) passes a contact surface (4) of one of two plate type connecting bodies (3), between which lies a pressure-contacted semiconductor body (14). Both connecting bodies (3, 5) comprise radially and axially oriented seal surfaces (8, 9; 11, 12), against which there abuts under pressure an elastic ring (13) which surrounds the semiconductor body. The cup is filled with sealing compound (18); the semiconductor body is thus protected against penetration of the sealing compound.Type: GrantFiled: March 6, 1984Date of Patent: August 19, 1986Assignee: Siemens AktiengesellschaftInventors: Herbert Vogt, Werner Egerbacher, Dieter Wunderlich, Werner Mitzkus
-
Patent number: 4607276Abstract: The present invention is directed to Tape Packages adapted to house semiconductor devices. The packages comprise a base component having a cover component disposed thereon to form an enclosure to house the semiconductor. A tape lead frame is disposed between the base and the cover and has a plurality of lead fingers extending into the enclosure for electrical connection to the semiconductor component. A spring between the base and the semiconductor device presses the semiconductor device into contact with the cover component. The spring comprises at least one of the lead fingers which is bonded to the semiconductor device and formed into an arch-like shape which contacts the base component.Type: GrantFiled: March 8, 1984Date of Patent: August 19, 1986Assignee: Olin CorporationInventor: Sheldon H. Butt
-
Patent number: 4603344Abstract: A rotatable rectifier assembly for use in a brushless generator. A housing 40 receives a stack of heat sinks 56-68 which are both thermally and electrically conductive and which sandwich diode wafers 78 making up a multiple phase, full wave rectifier. The requisite electrical connections are made by electrical connectors 102,110 slidably extending through the heat sinks and electrically connected to desired ones of the heat sinks and electrically isolated from other ones of the heat sinks.Type: GrantFiled: July 30, 1984Date of Patent: July 29, 1986Assignee: Sundstrand CorporationInventor: William C. Trommer
-
Patent number: 4603345Abstract: A module for a semiconductor chip is disclosed. The module includes a heat sink with a flat surface to which the back face of the semiconductor chip is directly bonded. The exposed face of the chip has an array of power, ground and signal contacts. A plurality of alternating power and ground bus bars span the exposed face of the chip. A multilayer ceramic is located on the other side of the bus bar array and has a surface proximate the power and ground bus bars with an array of contacts which correspond to at least the signal contacts on the chip. Power leads connect the power bus bars to adjacent power contacts on the chip; ground leads connect the ground bus bars to adjacent ground contacts on the chip; and signal leads pass between adjacent power and ground bus bars and interconnect the signal contacts on the chip with the corresponding signal contacts on the ceramic.Type: GrantFiled: March 19, 1984Date of Patent: July 29, 1986Assignee: Trilogy Computer Development Partners, Ltd.Inventors: James C. K. Lee, Gene M. Amdahl, Carlton G. Amdahl, Robert J. Beall, Anthony Matouk, John W. Sliwa, Andrzej Kucharek
-
Patent number: 4599636Abstract: An axial lead bridge rectifier includes four rectifying diode chips and a large pulse suppressor chip all disposed between the paddle sections of two coaxial leads. Two of the diodes are solder-connected in series between the two paddle sections, with their anodes solder-connected to a first cantilever conductive strip, the opposite end of which is soldered to one face of the pulse suppressor chip. The opposite face of the pulse suppressor chip is soldered connected to a second metal strip which extends in cantilever fashion from a solder connection to the cathodes of the other two diodes, which are also solder connected to the first and second paddle sections, respectively. The portion of the assembly including the paddle sections of the two axial leads and the rectifier bridge circuit and pulse suppressor thereof are encapsulated in suitable glass, plastic or ceramic material out of which the two axial leads extend.Type: GrantFiled: March 8, 1984Date of Patent: July 8, 1986Assignee: General Semiconductor Industries, Inc.Inventors: Ronald L. Roberts, Willard E. Payne
-
Patent number: 4598308Abstract: An assembly of intercoupled integrated circuit die comprises: a substrate having a plurality of holes which extend through the substrate; each hole is of a size that is suitable to receive an integrated circuit die; a plurality of independent subassemblies are also provided; each subassembly includes an integrated circuit die and a heat sink which is attached to the back of the die and extends beyond it; each subassembly is aligned with a respective hole in the substrate such that the die lies in the hole and the heat sink extends beyond the hole and attaches to the substrate; subassemblies are interconnected by printed conductors on the substrate and discrete wires that are bonded from the front of the die to the conductors; and the die and heat sink have similar thermal expansion coefficients, while the substrate has a substantially different thermal expansion coefficient.Type: GrantFiled: April 2, 1984Date of Patent: July 1, 1986Assignee: Burroughs CorporationInventors: Christopher D. James, Norman E. McNeal
-
Patent number: 4594605Abstract: An imaging device such as a silicon vidicon has a wafer of single crystal semiconductor material having an input sensing region and a charge storage region. A potential barrier is included within the input sensing region for controlling blooming. A passivation region is also included within the input sensing region to stabilize the atomic energy level along a first surface of the wafer. An anti-reflection layer of zinc sulfide and an anti-reflection layer of magnesium fluoride or Cryolite are sequentially deposited on the first surface of the wafer. The two anti-reflection layers form an anti-reflection region which enhances the quantum efficiency of the device in the wavelength range of 400 to 500 nanometers. Each of the layers has an optical thickness substantially equal to a quarter of the wavelength of light incident on the device. A method of forming the anti-reflection region is also disclosed.Type: GrantFiled: April 28, 1983Date of Patent: June 10, 1986Assignee: RCA CorporationInventor: William M. Kramer
-
Patent number: 4591896Abstract: An assembled semiconductor device comprising a base constituting one electrode, a semiconductor pellet mounted on the base, an insulation ring located to surround the semiconductor pellet and having a height larger than the thickness of the semiconductor pellet, an electrode member mounted on the insulation ring and in electrical contact with the upper surface of the semiconductor pellet, a lead electrode disposed on the electrode member, a pressure plate mounted on the lead electrode through an insulation member or being formed of an insulation material and disposed on the lead electrode, a bolt screwed into the base, and a pressing device which presses the semiconductor pellet through the pressure plate. The inventive device simplifies the assembling process, makes the maintenance easy, and improves the air-tightness for the semiconductor pellet.Type: GrantFiled: March 4, 1983Date of Patent: May 27, 1986Assignee: Hitachi, Ltd.Inventor: Seiki Kikuchi
-
Patent number: 4581625Abstract: A solid state color imaging device comprising a two dimensional array of stacked thin film photovoltaic devices with devices in each stack responsive to selected color bands. Color discrimination may be enhanced by design of intermediate transparent conductive layers to act as optical filters.Type: GrantFiled: December 19, 1983Date of Patent: April 8, 1986Assignee: Atlantic Richfield CompanyInventors: Charles F. Gay, Robert D. Wieting