Patents Examined by Venessa Perez-Ramos
  • Patent number: 6376377
    Abstract: Within a method for removing from over a substrate a chemical mechanical polish (CMP) residue layer there is first provided a substrate. There is then formed over the substrate: (1) a chemical mechanical polish (CMP) substrate layer having an aperture formed therein; (2) a chemical mechanical polish (CMP) planarized patterned layer formed within the aperture within the chemical mechanical polish (CMP) substrate layer; and (3) a chemical mechanical polish (CMP) residue layer formed upon at least one of the chemical mechanical polish substrate layer and the chemical mechanical polish (CMP) planarized patterned layer, where at least one of the chemical mechanical polish (CMP) substrate layer and the chemical mechanical polish (CMP) planarized patterned layer has a first aqueous contact angle.
    Type: Grant
    Filed: April 3, 2000
    Date of Patent: April 23, 2002
    Assignee: Taiwan Semiconductor Manufacturing Company
    Inventors: Weng Chang, Ying-Ho Chen, Jih-Churng Twu, Syun-Ming Jang
  • Patent number: 6090712
    Abstract: An insulated trench isolation structure is formed in a semiconductor substrate omitting a barrier nitride polish stop layer while avoiding substrate damage, thereby simplifying trench formation and improving planarity. After trench fill, polishing is conducted to effect substantial planarization without exposing the substrate surface, thereby avoiding substrate damage. Etching is then conducted to expose the substrate surface. The omission of the barrier nitride polish stop avoids generation of a topographical step at the substrate/trench fill interface, thereby enhancing the accuracy of subsequent photolithographic techniques in forming features with minimal dimensions.
    Type: Grant
    Filed: December 18, 1997
    Date of Patent: July 18, 2000
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Christopher F. Lyons, Basab Bandyopadhyay, Nick Kepler, Olov Karlsson, Larry Wang, Effiong Obok