Patents Examined by Viboh Tan
  • Efficient arrangement of interconnection resources on programmable logic devices
    Patent number: 6670825
    Abstract: Interconnection block arrangements for selectively interconnecting logic on a programmable logic device is provided. Programmable logic connectors within the interconnection blocks may be programmed to route signals between the various conductors on the device and to route signals from various logic regions on the device to the various conductors. The interconnection blocks are arranged to optimize the use of metallization resources and to increase interconnectivity and logic density.
    Type: Grant
    Filed: December 13, 2002
    Date of Patent: December 30, 2003
    Assignee: Altera Corporation
    Inventors: Christopher F. Lane, Giles V. Powell, Wayne Yeung, Chiakang Sung, Bruce B. Pedersen