Abstract: A high-frequency module includes a mounting substrate having main surfaces 30a and 30b, a first circuit component mounted on the main surface 30a, a second circuit component mounted on the main surface 30b, an external connection terminal arranged on the main surface 30b side relative to the main surface 30a with respect to the mounting substrate, a long via conductor connected to the first circuit component, passing through the mounting substrate, and having a substantially long shape when the mounting substrate is viewed in a plan view, and a metal block arranged on the main surface 30b side relative to the main surface 30a with respect to the mounting substrate and connecting the long via conductor and the external connection terminal. When the mounting substrate is viewed in a plan view, the first circuit component overlaps the long via conductor and the metal block overlaps the long via conductor.

Abstract: A flow sensor includes a semiconductor, an electric control circuit, a lead frame, and a spacer. The spacer is disposed in a clearance between the lead frame and the semiconductor device on an opposite side from a joint portion of the semiconductor device with the lead frame on a side of the electric control circuit across the diaphragm disposed therebetween. A surface of the electric control circuit and a part of a surface of the semiconductor device is covered with resin while the air flow sensing unit is exposed. At the joint portion, the semiconductor device is attached to the lead frame via an adhesive.

Abstract: Provided is a semiconductor device comprising a semiconductor substrate that includes a transistor region; an emitter electrode that is provided on the semiconductor substrate; a first dummy trench portion that is provided on the transistor region of the semiconductor substrate and includes a dummy conducting portion that is electrically connected to the emitter electrode; and a first contact portion that is a partial region of the transistor region, provided between an end portion of a long portion of the first dummy trench portion and an end portion of the semiconductor substrate, and electrically connects the emitter electrode and a semiconductor region with a first conductivity type provided in the transistor region.

Abstract: A FinFET device structure is provided. The FinFET device structure includes a fin structure formed over a substrate, and a gate structure formed over the fin structure. The FinFET device structure also includes an epitaxial source/drain (S/D) structure formed over the fin structure. A top surface and a sidewall of the fin structure are surrounded by the epitaxial S/D structure. A first distance between an outer surface of the epitaxial S/D structure and the sidewall of the fin structure is no less than a second distance between the outer surface of the epitaxial S/D structure and the top surface of the fin structure.

Abstract: A display device includes a display panel having a first emission region and a second emission region that surrounds the first emission region. The display device includes a first plurality of light emitters arranged in the first emission region, a plurality of activation lines for the first emission region, a second plurality of light emitters arranged in the second emission region, and a plurality of activation lines for the second emission region. A single activation line of the plurality of activation lines for the first emission region is electrically coupled with a first number of light emitters in the first emission region and a single activation line of the plurality of activation lines for the second emission region is electrically coupled with a second number, distinct from the first number, of light emitters in the second emission region.

Abstract: A semiconductor device includes a substrate including a memory cell region and a connection region, a plurality of gate electrodes in the memory cell region and the connection region, a plurality of channel structures passing through the plurality of gate electrodes and extending in a vertical direction in the memory cell region, and a plurality of pad layers extending in a first direction from each of the plurality of gate electrodes in the connection region. The plurality of pad layers is disposed in a stepped form in a second direction. The device further includes a plurality of dummy lines arranged in one row in the first direction between two pad layers adjacent to each other in the second direction and disposed apart from one another with a pad connection region therebetween in the first direction. The pad connection region overlaps two pad layers successively disposed in the first direction.

Abstract: A method of manufacturing a semiconductor package includes preparing a core substrate having an upper surface and a lower surface, and including a cavity. A passive component is disposed in the cavity. A first insulating layer is formed on the upper surface of the core substrate and in the cavity and encapsulates the passive component. Through-vias are formed that penetrate the core substrate and the first insulating layer, and a first wiring layer is formed on the first insulating layer. The first wiring layer connects the through-vias and the passive component. A connection structure including an insulating member is formed on the first insulating layer and a redistribution layer is formed in the insulating member. The redistribution layer is connected to the first wiring layer. A semiconductor chip is disposed on an upper surface of the connection structure. The semiconductor chip has connection pads connected to the redistribution layer.

Abstract: The present disclosure provides a nitrogen-containing compound, and an electronic component and an electronic device including the same, and belongs to the technical field of organic electroluminescence. The nitrogen-containing compound provided by the present disclosure has polycyclic conjugation properties, the compound has a core structure of fused indolocarbazole. The bond energy between the atoms is high, thus the compound has a good thermal stability, and facilitates solid state accumulation between the molecules. The electroluminescence device with the compound as a luminescent layer material has a long service life. According to the nitrogen-containing compound provided by the present disclosure with an indolocarbazole structure connecting with a nitrogen-containing group (triazine, pyridine and pyrimidine) and a benzoxazole or benzothiazole group respectively has a high dipole moment, thereby improving the polarity of the material.

Abstract: A graphene barrier layer is disclosed. Some embodiments relate to a graphene barrier layer capable of preventing diffusion from a fill layer into a substrate surface and/or vice versa. Some embodiments relate to a graphene barrier layer that prevents diffusion of fluorine from a tungsten layer into the underlying substrate. Additional embodiments relate to electronic devices which contain a graphene barrier layer.

Abstract: A semiconductor package includes: a first structure having a first insulating layer disposed on one surface, and first electrode pads and first dummy pads penetrating through the first insulating layer, a second structure having a second insulating layer having the other surface bonded to the one surface and the first insulating layer and disposed on the other surface, and second electrode pads and second dummy pads that penetrate through the second insulating layer, the second electrode pads being bonded to the first electrode pads, respectively, and the second dummy pads being bonded to the first dummy pads, respectively. In the semiconductor chip, ratios of surface areas per unit area of the first and second dummy pads to the first and second insulating layers on the one surface and the other surface gradually decrease toward sides of the first and second structures.

Abstract: Systems are described. A system includes a silicon backplane having a top surface, a bottom surface, and side surfaces and a substrate surrounding the side surfaces of the silicon backplane. The substrate has a top surface, a bottom surface and side surfaces. At least one bond pad is provided on the bottom surface of the substrate. A metal layer is provided on the bottom surface of the substrate and the bottom surface of the silicon backplane and has a first portion electrically and thermally coupled to the bottom surface of the silicon backplane in a central region and second portions that extend between a perimeter region of the silicon backplane and the at least one bond pad. An array of metal connectors is provided on the top surface of the silicon backplane.

Abstract: An organic electroluminescence device includes a first electrode; an emission layer on the first electrode; and a second electrode on the emission layer, wherein the emission layer comprises an organometallic compound represented by Formula 1, and the organic electroluminescence device can achieve long life and deep blue light emission:

Abstract: The present application provides a display panel, a manufacturing method thereof, and a display device. The present application adopts a molybdenum/copper stackup to form a solder pad for bonding, which can effectively solve a problem of a poor bonding force between MTD and a soldering material in the prior art. Meanwhile, a bonding lead is made of titanium-molybdenum-nickel alloy/copper/titanium-molybdenum-nickel alloy stackup, which can reduce manufacturing processes of the display panel and reduce manufacturing costs.

Abstract: Apparatuses, devices and systems associated with semiconductor packages with chiplet and memory device coupling are disclosed herein. In embodiments, a semiconductor package may include a first chiplet, a second chiplet, and a memory device. The semiconductor package may further include an interconnect structure that couples the first chiplet to a first memory channel of the memory device and the second chiplet to a second memory channel of the memory device. Other embodiments may be described and/or claimed.

Abstract: A method for preparing a semiconductor device structure is provided. The method includes forming an isolation structure in a semiconductor substrate, and recessing the semiconductor substrate to form a first opening and a second opening. The first opening and the second opening are on opposite sides of the isolation structure, and a width of the second opening is greater than a width of the first opening. The method also includes forming an electrode layer over the semiconductor substrate. The first opening and the second opening are filled by the electrode layer. The method further includes polishing the electrode layer to form a gate electrode in the first opening and a resistor electrode in the second opening, and forming a source/drain (S/D) region in the semiconductor substrate.

Abstract: A package that includes a substrate, an integrated device, a first encapsulation layer and a void. The substrate includes a first surface. The integrated device is coupled to the first surface of the substrate. The first encapsulation layer is located over the first surface of the substrate and the integrated device. The first encapsulation layer includes an undercut relative to a side surface of the integrated device. The void is located between the integrated device and the first surface of the substrate. The void is laterally surrounded by the undercut of the encapsulation layer.

Abstract: An object is to provide a display device with a high aperture ratio or a semiconductor device in which the area of an element is large. A channel formation region of a TFT with a multi-gate structure is provided under a wiring that is provided between adjacent pixel electrodes (or electrodes of an element). In addition, a channel width direction of each of a plurality of channel formation regions is parallel to a longitudinal direction of the pixel electrode. In addition, when a channel width is longer than a channel length, the area of the channel formation region can be increased.

Abstract: A package structure and a formation method of a package structure are provided. The method includes forming multiple conductive vias in a carrier substrate and forming a redistribution structure over the carrier substrate. The redistribution structure has multiple polymer-containing layers and multiple conductive features. The method also includes disposing multiple chip structures over the redistribution structure. The method further includes bonding the carrier substrate to a package structure.

Abstract: A semiconductor package includes a redistribution layer including, a first insulating layer including a first trench, a first conductive layer including a first conductive region extending along a top surface of the first insulating layer and a second conductive region disposed inside the first trench, a second insulating layer on the first conductive layer and the first insulating layer, the second insulating layer including a second trench at least partially overlapping the first trench, the second trench exposing a part of the first conductive region and a second conductive layer including a third conductive region extending along a top surface of the second insulating layer and a fourth conductive region disposed on the second conductive region inside a via trench including sidewalls of the first trench and the second trench, and wherein the second and fourth conductive regions have a width in a range of 20 ?m to 600 ?m.

Abstract: A 3D LED display panel that includes a substrate and an array light emitting devices mounted on the substrate. The array of light emitting devices includes a plurality of first light emitting devices and a plurality of second light emitting devices. Each first light emitting device has an LED chip/package electrically connected to the substrate and a piece of first circular polarizer attached to the LED chip/package. Likewise, each second light emitting device includes an LED chip/package electrically connected to the substrate and a piece of second circular polarizer attached to the LED chip/package. The first circular polarizer the second circular polarizer have opposite circular polarizations.