Abstract: An embodiment semiconductor package includes a bare semiconductor chip, a packaged semiconductor chip adjacent the bare semiconductor chip, and a redistribution structure bonded to the bare semiconductor chip and the packaged semiconductor chip. The redistribution structure includes a first redistribution layer having a first thickness; a second redistribution layer having a second thickness; and a third redistribution layer between the first redistribution layer and the second redistribution layer. The third redistribution layer has a third thickness greater than the first thickness and the second thickness. The package further includes an underfill disposed between the bare semiconductor chip and the redistribution structure and a molding compound encapsulating the bare semiconductor chip, the packaged semiconductor chip, and the underfill.

Abstract: A semiconductor package includes: a substrate; a first semiconductor chip positioned over the substrate and electrically connected to the substrate; a second semiconductor chip stack positioned over the first semiconductor chip and including a plurality of second semiconductor chips that are stacked in a vertical direction while being electrically connected to the first semiconductor chip; and a dummy third semiconductor chip positioned over the second semiconductor chip stack, wherein a third height of a third bonding structure coupling the third semiconductor chip to an uppermost second semiconductor chip among the second semiconductor chips is greater than a second height of a second bonding structure coupling one among the second semiconductor chips to an another one among the second semiconductor chips positioned directly therebelow or the first semiconductor chip positioned directly therebelow.

Abstract: A display device includes a circuit substrate comprising a first electrode pad and an LED chip comprising a first electrode bump that is electrically connected to the first electrode pad, and at least emitting light in a direction of the circuit substrate. The first electrode pad comprises a first light transmission region that transmits light emitted from the LED chip.

Abstract: A diode array includes a substrate and a plurality of light emitting diodes disposed on the substrate and arranged in an array. Each of the light emitting diodes includes a stack of functional layers includes a first semiconductor layer, a second semiconductor layer, and a light emitting layer located between the first semiconductor layer and the second semiconductor layer. At least one of the light emitting diodes includes a first current limiting region covering at least a portion of the first semiconductor layer, the light emitting layer or the second semiconductor layer; a first electrode electrically connected to the first semiconductor layer; and a second electrode electrically connected to the second semiconductor layer, wherein the first electrode and the second electrode are disposed at the same side of the first semiconductor layer.

Abstract: A method includes bonding a supporting substrate to a semiconductor substrate of a wafer. A bonding layer is between, and is bonded to both of, the supporting substrate and the semiconductor substrate. A first etching process is performed to etch the supporting substrate and to form an opening, which penetrates through the supporting substrate and stops on the bonding layer. The opening has substantially straight edges. The bonding layer is then etched. A second etching process is performed to extend the opening down into the semiconductor substrate. A bottom portion of the opening is curved.

Abstract: A method for producing at least one nitride layer includes providing a stack having a plurality of pillars extending from a substrate of the stack. Each pillar includes at least a crystalline section and a summit having a summit surface area The method also includes growing by epitaxy a crystallite from the summit of some the plurality of pillars and continuing the epitaxial growth of the crystallites until the crystallites supported by the pillars coalesce. The plurality of pillars includes at least one retention pillar and separation pillars. The pillars are configured so that once the nitride layer is formed, the at least one retention pillar retains the nitride layer and some of the separation pillars can fracture.

Abstract: A semiconductor package includes a package substrate, an interposer on the package substrate, and a first semiconductor device and a second semiconductor device on the interposer, the first and second semiconductor devices connected to each other by the interposer, wherein at least one of the first semiconductor device and the second semiconductor device includes an overhang portion protruding from a sidewall of the interposer.

Abstract: A method of fabricating a light emitting device for a display, the method including the steps of growing a first LED stack on a first growth substrate, the first LED stack including a first conductivity type semiconductor layer and a second conductivity type semiconductor layer, growing a second LED stack on a second growth substrate, the second LED stack including a first conductivity type semiconductor layer and a second conductivity type semiconductor layer, bonding the second LED stack to a first temporary substrate, removing the second growth substrate from the second LED stack, bonding the second LED stack to the first LED stack, and removing the first temporary substrate from the second LED stack.

Abstract: A semiconductor structure includes a substrate, a first semiconductor fin, a second semiconductor fin, and a first lightly-doped drain (LDD) region. The first semiconductor fin is disposed on the substrate. The first semiconductor fin has a top surface and sidewalls. The second semiconductor fin is disposed on the substrate. The first semiconductor fin and the second semiconductor fin are separated from each other at a nanoscale distance. The first lightly-doped drain (LDD) region is disposed at least in the top surface and the sidewalls of the first semiconductor fin.

Abstract: An ink includes a solvent, and light-emitting elements dispersed in the solvent, each of the light-emitting elements comprising semiconductor layers and an insulating film partially surrounding outer surfaces of the semiconductor layers, wherein the solvent has Hansen solubility parameters of a polarity parameter between about 4 and about 9 and a hydrogen bonding parameter between about 6 and about 11.

Abstract: Disclosed herein are CdSeTe photovoltaic devices having interdigitated back contact architecture for use in polycrystalline thin films in photovoltaic devices.

Abstract: A method includes bonding a first package component and a second package component to an interposer. The first package component includes a core device die, and the second package component includes a memory die. An Independent Passive Device (IPD) die is bonded directly to the interposer. The IPD die is electrically connected to the first package component through a first conductive path in the interposer. A package substrate is bonded to the interposer die. The package substrate is on an opposing side of the interposer than the first package component and the second package component.

Abstract: A package includes a first layer of molding material, a first metallization layer on the first layer of molding material, a second layer of molding material on the first metallization layer and the first layer of molding material, a second metallization layer on the second layer of molding material, through vias within the second layer of molding material, the through vias extending from the first metallization layer to the second metallization layer, integrated passive devices within the second layer of molding material, a redistribution structure electrically on the second metallization layer and the second layer of molding material, the redistribution structure connected to the through vias and the integrated passive devices, and at least one semiconductor device on the redistribution structure, the at least one semiconductor device connected to the redistribution structure.

Abstract: An assembly. In some embodiments, the assembly includes a first semiconductor chip, a substrate, and a first alignment element. The alignment of the first semiconductor chip and the substrate may be determined at least in part by engagement of the first alignment element with a first recessed alignment feature, in a surface of the first semiconductor chip.

Abstract: A method includes forming an epitaxy semiconductor layer over a semiconductor substrate, and etching the epitaxy semiconductor layer and the semiconductor substrate to form a semiconductor strip, which includes an upper portion acting as a mandrel, and a lower portion under the mandrel. The upper portion is a remaining portion of the epitaxy semiconductor layer, and the lower portion is a remaining portion of the semiconductor substrate. The method further includes growing a first semiconductor fin starting from a first sidewall of the mandrel, growing a second semiconductor fin starting from a second sidewall of the mandrel. The first sidewall and the second sidewall are opposite sidewalls of the mandrel. A first transistor is formed based on the first semiconductor fin. A second transistor is formed based on the second semiconductor fin.

Abstract: A transistor comprises a top source/drain region, a bottom source/drain region, a channel region vertically between the top and bottom source/drain regions, and a gate operatively laterally-adjacent the channel region. At least one of the top source/drain region, the bottom source/drain region, and the channel region are crystalline. All crystal grains within the at least one of the top source/drain region, the bottom source/drain region, and the channel region have average crystal sizes within 0.064 ?m3 of one another. Other embodiments, including methods, are disclosed.

Abstract: A display device, such an organic light emitting display device is disclosed. The display device includes an insulating film including a concave portion in an area of at least one subpixel, a first electrode on a side portion of the concave portion and on the concave portion in an area of the subpixel, an organic layer overlapping the concave portion and on the first electrode. An organic layer disposed in the at least one blue subpixel may include at least one of a first light emitting dopant with a maximum emission wavelength of 457 nm or less, a second light emitting dopant with a full width at half maximum (FWHM) of 30 nm or less, and/or a third light emitting dopant with the maximum emission wavelength of 457 nm or less and the full width at half maximum of 30 nm or less. Thus, a display device with enhanced light extraction efficiency is provided.

Abstract: A display device can include a wiring substrate including a first electrode, a plurality of semiconductor light-emitting elements electrically connected to the first electrode, a conductive adhesive layer on the wiring substrate and around the plurality of semiconductor light-emitting elements, an upper layer on one surface of the conductive adhesive layer and including a plurality of through holes corresponding to the plurality of semiconductor light-emitting elements, respectively, and a second electrode on the upper layer and electrically connected to the plurality of semiconductor light-emitting elements. The upper layer can include a thermosetting adhesive.

Abstract: This thermally conductive silicone composition contains: (A) 100 parts by mass of a diorganopolysiloxane in which both terminals of a molecular chain are blocked with hydroxy groups; (B) 150-600 parts by mass of an organopolysiloxane with a particular structure having at least one hydrolyzable silyl group in one molecule; (C) 0.1-100 parts by mass of a crosslinking agent component; (D) 1,500-6,500 parts by mass of zinc oxide particles which have an average particle diameter of 0.1 ?m to 2 ?m, and in which the content ratio of a coarse powder having a particle diameter of 10 ?m or more in a laser diffraction-type particle size distribution is 1 vol % or less with respect to the total amount of component (D); and (E) 0.01-30 parts by mass of an adhesion promoter, wherein the content of component (D) is 45-70 vol % with respect to the total composition.

Abstract: A semiconductor device of embodiments includes: a first electrode; a second electrode; a gate electrode extending in a first direction; and a SiC layer. The SiC layer includes: a first conductive type first SiC region having a first region, a second region facing the gate electrode, and a third region in contact with the first electrode; a second conductive type second SiC region between the second region and the third region; a second conductive type third SiC region, the second region interposed between the second SiC region and the third SiC region; a second conductive type fourth SiC region, the third region interposed between the second SiC region and the fourth SiC region; a first conductive type fifth SiC region; a second conductive type sixth SiC region between the first region and the second SiC region; and a second conductive type seventh SiC region between the first region and the second SiC region and distant from the sixth SiC region in the first direction.