Patents Examined by Viktor Simkovlc
  • Patent number: 6238992
    Abstract: A method for manufacturing resistors comprising the steps of forming a top electrode layer on a top face of a substrate, a resistance pattern connected to the top electrode layer, a protective layer covering the resistance pattern, a thin metal film side electrode layer on a side face of the substrate which is electrically connected to the top electrode layer, and a concavity by removing a part of the side electrode layer and substrate.
    Type: Grant
    Filed: January 11, 1999
    Date of Patent: May 29, 2001
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventor: Hiroyuki Yamada