Abstract: A bias offset voltage circuit for controlling one or more devices is disclosed. The bias offset voltage circuit includes a three voltage sources connected in series and a switching element. Each voltage source includes a positive terminal and a negative terminal. The switching element includes a positive input terminal, a negative input terminal, and an output terminal. The negative terminal of the first voltage source is connected to the negative input terminal. The positive terminal of the third voltage source is connected to the positive input terminal. The terminals of the second voltage source are used to drive a first device. The output terminal of the switching element drives a second device. The bias offset voltage circuit may be used to provide proper voltages to each of the devices where the higher-supplied voltage could damage the device supplied with the lower supplied voltage, or vice versa.

Abstract: In a liquid crystal television, a display controller prevents burning of a liquid crystal panel due to irregularity in a synchronization signal. A counter of a liquid crystal display controller detects a period of a horizontal synchronization signal and a vertical synchronization signal. A comparator compares a count value with a predetermined minimum value Min and maximum value Max. When the count value is out of a range, a synchronization pulse generator generates a synchronization pulse at a time when the period falls within a predetermined range. A selector outputs an input synchronization signal when the period is within the range and outputs the synchronization pulse obtained from the synchronization pulse generator when the period is out of the range.

Abstract: A liquid crystal display of compact size is disclosed. The liquid crystal display has a tape carrier package and a single integrated PCB for processing a gate driving signal and data driving signal. The tape carrier package includes a base substrate, a gate driver IC formed on said base substrate, an input pattern formed on said base substrate that applies gate driving signals input from an external device to the gate driver IC, a first output pattern formed on said base substrate that outputs a first gate driving signal processed in said gate driver IC, and a second output pattern formed on said base substrate, that outputs a second gate driving signal bypassing the gate driver IC among the gate driving signals.

Abstract: An aperture grill type display device is provided that displays a picture including two areas whose luminance values are different from each other without vertical stripes. The aperture grill type display device includes an aperture grill to which plural wires are attached. When displaying a picture including a window whose luminance value is higher than that of a desktop, the luminance value of the window is decreased if the energy that electron beams emitted from an electron gun of the display device give to the wires for displaying the window exceeds the energy that the electron beams give to all the wires by a predetermined ratio.

Abstract: Each of stages RS(1), RS(2), . . . of a shift register is constituted by six TFTs. A ratio of a channel width and a channel length (W/L) of each of these TFTs 1 to 6 is set in accordance with a transistor characteristic of each TFT in such a manner that the shift register normally operates for a long time even at a high temperature.