Patents Examined by W. Tupman
  • Patent number: 4003127
    Abstract: A semiconductor pressure transducer having a polycrystalline silicon diaphragm providing an extremely pressure sensitive and temperature stable device, and a method of making the same. The polycrystalline silicon can easily be vapor deposited on an etch resistant layer covering a surface of a wafer or base, preferably monocrystalline silicon. Such vapor deposition of the polycrystalline silicon more accurately and consistently defines the thickness of the diaphragm than can be obtained by grinding or etching. A pressure responsive resistor formed in the diaphragm is automatically electrically isolated by the comparatively high resistivity of the polycrystalline silicon. Accordingly, PN junction isolation and passivating oxides on the diaphragm are not required thereby resulting in increased temperature stability.
    Type: Grant
    Filed: September 26, 1975
    Date of Patent: January 18, 1977
    Assignee: General Motors Corporation
    Inventors: James M. Jaffe, John Y. W. Seto
  • Patent number: 3999280
    Abstract: A narrow lead contact is disclosed for face down bonding of electronic chips, such as light emitting diodes. The narrow lead and the circuitry associated with the chip or diode is formed on a thin film of transparent insulating material in a conventional manner. The chip is placed face down on the lead on the film and bonded thereto. The bonding can be accomplished by known methods including solder reflow or conductive epoxys. A second lead, which may include a reflector in the case of a light emitting diode, is attached to another point on the chip. When the chip is a light emitting diode, the chip assembly can be encapsulated in a lens system which is attached to both sides of the film. Most of the light emitted from the back and sides of the diode is thus passed out through the film and lens system since the thin lead will preferably obscure less than 35% of the face of the diode. The circuitry formed on the thin film may contain an adjustable resistance to compensate for variations in light intensity.
    Type: Grant
    Filed: October 1, 1975
    Date of Patent: December 28, 1976
    Assignee: AMP Incorporated
    Inventors: Niels Junior Hansen, Ronald James Capp
  • Patent number: 3999827
    Abstract: A unique contact pin configuration for an electrical connector provides an advantageous connection with a leadless semiconductor device package and a printed circuit board on which the connector is to be mounted. Each contact pin includes an elongated shaft portion, a resilient contact portion and a crossbar portion which offsets the contact portion from the shaft portion of the contact pin. Each contact pin is alternately situated 180.degree. in cavities disposed on two opposed sides of the connector. Consequently, the contact portions of the contact pins provide internal electrical connection to a leadless semiconductor device package with a small contact pad spacing, while providing an external electrical connection via the contact pin shaft portions with a larger spacing therebetween. Also described herein are distinctive stand-off bumps which are coaxial with the shaft portions of the contact pins to insure level mounting onto a printed circuit board.
    Type: Grant
    Filed: October 10, 1975
    Date of Patent: December 28, 1976
    Assignee: Burroughs Corporation
    Inventors: Robert V. Hutchison, John A. Nelson, Gerald R. Dunn
  • Patent number: 3999285
    Abstract: A semiconductor device package and a method of making it. A woven fiber mat impregnated with an epoxy adhesive serves as a first housing member. It includes an opening therein for receiving a semiconductor device. The housing member is placed on a supporting heat sink and a lead frame placed on top of the housing member. This subassembly is heated to bond the elements together by curing the epoxy adhesive in the first housing member. A similar second housing member is then placed over the lead frame. The second housing member includes an opening therein which is slightly larger than the opening in the first housing member. A lid is placed on top of the second housing member to cover the opening after the semiconductor device has been bonded to the substrate within the openings in the housing members. The assembly is then again heated to bond the remaining elements together with the epoxy adhesive in the second housing member to form a completed package.
    Type: Grant
    Filed: June 30, 1975
    Date of Patent: December 28, 1976
    Assignee: Burroughs Corporation
    Inventors: Terrence E. Lewis, Kenneth N. Abel
  • Patent number: 3999284
    Abstract: A catheter system for blood gas monitoring and the method of making same comprising a polarographic sensing means having a body, first and second conductors supported by the body and each respectively having an exposed conducting surface at a region of the body, electrolytic material supported by the body at said region in contact with the exposed surfaces at the first and second conductors, and a membrane supported by the body extending over the region of said body covering the electrolytic material. The membrane is pervious to oxygen in the fluid system and semi-pervious to water. The electrolytic material is anhydrous prior to use of the device and is activated by immersing in a aqueous solution just before use. The sensing means is at the end of a cable carrying the conductors which cable has its other end joined to the connector end of a terminal or transport unit.
    Type: Grant
    Filed: April 10, 1975
    Date of Patent: December 28, 1976
    Assignee: Mediscience Technology Corporation
    Inventor: Haim I. Bicher
  • Patent number: 3999281
    Abstract: A method is provided for fabricating a gridded Schottky barrier field effect transistor and to the transistor produced thereby. The transistor is constructed by means of a single high resolution mask which does not require alignment to any reference line. Utilizing the masking properties of an oxidation layer on the sides of the etched slots, platinum is deposited only at the bottom of the groove thereby eliminating the requirement of an additional photo-masking step or the necessity of subsequent removal of platinum from other surfaces of the wafer.
    Type: Grant
    Filed: January 16, 1976
    Date of Patent: December 28, 1976
    Assignee: The United States of America as represented by the Secretary of the Air Force
    Inventors: Herbert Goronkin, Richard W. Aldrich
  • Patent number: 3999282
    Abstract: A silicon crystal body having a major surface lying parallel to a {110} or {100} crystal plane is prepared. A silicon oxide film is formed on the major surface by heating the body in an atmosphere containing steam. Then, an aluminum layer is formed on the oxide film. Thereby the amount of surface donors induced in the major surface of the body by the existence of the oxide film is smaller than the amount of induced surface donors to be obtained in a crystal plane of a like silicon body but lying parallel to a {111} plane covered with a like oxide film. The amount of induced surface donors is further reduced by subjecting said body to a heat treatment under application across said oxide film of such a voltage as that which renders the aluminum layer provided on the oxide film negative polarity. This invention is applied to the manufacture of, for example, MOS field effect transistors, MOS diodes and so-called planar transistors.
    Type: Grant
    Filed: September 14, 1970
    Date of Patent: December 28, 1976
    Assignee: Hitachi, Ltd.
    Inventors: Minoru Ono, Toshimitsu Momoi, Youji Kawachi
  • Patent number: 3997963
    Abstract: A beam-lead integrated circuit chip structure which comprises a semiconductor chip substrate having a passivated planar surface from which active and passive devices in the circuit extend into the substrate. A plurality of peripheral beam-leads interconnected with the chip devices extend beyond the periphery of the chip and a plurality of solder mounds having a lower melting point than said beam-leads extends from the surface of the chip to a point beyond the plane of the beam-leads.This chip structure permits a method of automatic alignment of said plurality of beam-leads with a corresponding plurality of beam-leads on a dielectric substrate which involves placing the chip on the substrate so that said plurality of solder mounds are respectively in registration with a plurality of corresponding solder-wettable land pads on said non-wettable dielectric substrate.
    Type: Grant
    Filed: April 9, 1975
    Date of Patent: December 21, 1976
    Assignee: IBM Corporation
    Inventor: Jacob Riseman
  • Patent number: 3996656
    Abstract: A normally-off field effect transistor having the structure of an IGFET with a substantially undoped semiconductor material replacing the insulation between the substrate and the gate metal. A Schottky barrier formed between the gate metal and the substantially undoped semiconductor material produces a channel in the substrate when reverse biased. Method of fabrication is also described.
    Type: Grant
    Filed: December 24, 1975
    Date of Patent: December 14, 1976
    Assignee: Harris Corporation
    Inventor: Koy B. Cook, Jr.
  • Patent number: 3996655
    Abstract: The disclosure relates to methods of forming Insulated Gate Field Effect transistors and the product suitable for integrated circuits with channel lengths of 1 micron or less, the transistors being isolated from other transistors or other components in the circuit without the requirements of extra isolation steps. This is provided by means of a double diffusion which isolates the channel of the transistor from other elements in the circuit. Channel length is solely a function of the diffusion schedule through openings in the oxide through which the double diffusion takes place.
    Type: Grant
    Filed: August 25, 1975
    Date of Patent: December 14, 1976
    Assignee: Texas Instruments Incorporated
    Inventors: James A. Cunningham, James E. Schroeder, Mark Roman Guidry
  • Patent number: 3996657
    Abstract: A double polycrystalline silicone gate memory device having a floating gate for storing charge and a control gate. The memory device may be used as a single device cell in a memory array. A double self-aligning method is used to form the source and drain regions while doping the gates. Through a predeposition step a lightly doped secondary source and drain regions are formed in alignment with the floating gate prior to the formation of the primary source and drain regions in alignment with the control gate.
    Type: Grant
    Filed: January 13, 1976
    Date of Patent: December 14, 1976
    Assignee: Intel Corporation
    Inventors: Richard T. Simko, Phillip J. Salsbury
  • Patent number: 3996659
    Abstract: An improved method of semiconductor device manufacture is provided in which the surfaces of glass sealed feed-through terminals are mechanically abraded to a uniform matte finish prior to plating and subsequent assembly. The mechanical abrasion, which in the preferred embodiment is performed by dry sand blasting, reduces the cost and improves the yield in subsequent assembly bonding steps and in particular substantially eliminates cold forming defects on the terminal nail head surface such that electrical conductors can be ultrasonically bonded thereto.
    Type: Grant
    Filed: February 10, 1976
    Date of Patent: December 14, 1976
    Assignee: Motorola, Inc.
    Inventors: Stanley Gaicki, Albert Louis Summers
  • Patent number: 3996658
    Abstract: A distance between two electrodes of a CCD device is reduced to an extremely small value, thereby increasing the memory density, of the CCD device. In the process of the present invention, upon formation of a first electrode, an insulating layer is formed on the entire top surface of the semiconductor wafer. The material of another electrode is then placed on the entire top surface of the wafer. These layers are then selectively removed to form a CCD structure.
    Type: Grant
    Filed: March 30, 1976
    Date of Patent: December 14, 1976
    Assignee: Fujitsu Ltd.
    Inventors: Akira Takei, Yoshihiko Hika, Ryoiku Togei
  • Patent number: 3995930
    Abstract: An all dielectric right angle connector is disclosed for interconnecting a pluggable high voltage tube with an electrical high voltage lead. A high voltage lead is terminated with an electrical receptacle type contact which is latchably retained within an elbow portion of the connector. A braided conductive sheath or shielding of the cable is received over an end of the connector provided with projecting teeth. A tapered sleeve is latchably secured to the teeth captivating the sheath. The sleeve is oriented by a polarizing feature of the connector. The contact is deeply recessed from each end of the connector for shock protection.
    Type: Grant
    Filed: June 2, 1975
    Date of Patent: December 7, 1976
    Assignee: AMP Incorporated
    Inventor: Henry Otto Herrmann, Jr.
  • Patent number: 3992770
    Abstract: The leads of a stem are first formed or bent to accurately position them relative to a pedestal of the stem, the pedestal being that portion of the stem on which a semiconductor pellet is to be mounted. The formed leads are thereafter used as a means for accurately locating the stem at a parts assembling work station at which a pellet is disposed on the pedestal in preselected positional relation with the leads and contacts are disposed on the leads and pressed into engagement with the pellet.
    Type: Grant
    Filed: August 30, 1974
    Date of Patent: November 23, 1976
    Assignee: RCA Corporation
    Inventor: Philip Lawrence Myers
  • Patent number: 3993293
    Abstract: An automatic leaching system for the hydrometallurgical production of zinc comprising a pH meter and means for detecting the feed rate of calcine. The pH meter is provided with means for automatically washing the electrodes thereof so as to be capable of continuously and automatically detecting the pH value of the slurry obtained by mixing a spent electrolyte with the calcine. The system comprises a feedback control circuit and a feed-forward control circuit in which the flow rate of the spent electrolyte supplied to the system is the manipulated variable, and the pH value of the slurry is the controlled variable. These control circuits are used for the pH control so that the pH value of the slurry can be maintained constant by controlling the flow rate of the spent electrolyte.
    Type: Grant
    Filed: June 24, 1975
    Date of Patent: November 23, 1976
    Assignee: Mitsui Mining & Smelting Co., Ltd.
    Inventors: Satoshi Mukae, Yoshitaka Shiota
  • Patent number: 3991461
    Abstract: An improved method of constructing a semiconductor device of the encapsulated type wherein a stack of members including a semiconductor element is encapsulated along with spring means ensuring compressive contact to the element contact areas. Hitherto up to five spring washers were needed to keep total spring deflection to within a value giving a desired compressive force, due to accumulated thickness tolerances of the stack members. In the present invention, a plastically deformable member is included in the stack initially along with a thickness gauge member such that bringing together the encapsulation housing parts round the stack flattens a single included spring washer and deforms the deformable member by a certain extent. This certain extent is such that when the stack is re-assembled without the thickness gauge, the plastically deformable member is now of a thickness to cause the spring to deform by an amount giving a desired compression force in the finished stack.
    Type: Grant
    Filed: February 18, 1976
    Date of Patent: November 16, 1976
    Assignee: Westinghouse Brake & Signal Company Limited
    Inventor: Thomas Alexander Anderson
  • Patent number: 3991460
    Abstract: A method is provided for making a light activated semiconductor controlled rectifier in a semiconductor body having opposed first and second major surfaces. Impurities are sequentially provided in the major surfaces to form four regions of alternate type conductivity disposed alternatively through the body between the major surfaces, with a PN junction between each region. An etchant solution is prepared preferably substantially equal amounts of chromium trioxide and water, and adding to said first solution just prior to use a given, preferably about 50% hydrofluoric acid solution in predetermined amounts preferably of substantially one part for each two parts of the first solution.
    Type: Grant
    Filed: March 25, 1975
    Date of Patent: November 16, 1976
    Assignee: Westinghouse Electric Corporation
    Inventor: John S. Roberts
  • Patent number: 3990757
    Abstract: A connecting device is adapted to releasably hold a portion of a first object, such as a pilot's oxygen mask, to a portion of a second object, such as a pilot's helmet. The connecting device broadly includes an anchor member mounted on the mask, a housing member mounted on the helmet and having a female passageway, a male member adapted to be inserted into the female passageway, and a cable member having one marginal end portion secured to the anchor member and another marginal end portion secured to the male member. The housing member has a toothed pawl section biased to move into the female passageway. The male member has a ratchet rack adapted to engage the pawl section to prevent unintended separation of the male member from the female passageway. The male member includes a release member movably mounted relative to the rack, and having an operative surface adapted to extend beyond the rack teeth.
    Type: Grant
    Filed: December 11, 1975
    Date of Patent: November 9, 1976
    Assignee: Carleton Controls Corporation
    Inventor: Lawrence H. Gill
  • Patent number: 3988824
    Abstract: A thin film capacitor and resistor is disclosed, each capacitor being formed by a structure including a metallic film on an insulating substrate, the metallic film having an oxidized surface formed by anodizing, an oxide layer on the oxidized surface of the metallic film, and a pair of spaced-apart conductor layers over the oxide layer, each resistor being formed by a resistive film on the substrate and a pair of spaced-apart conductor layers connecting with the ends of the resistive film. In the manufacture of the circuit, a predeposited substrate is produced that may be utilized by circuit designers in the subsequent fabrication of custom microcircuits. A heat treating technique is employed in trimming the resistors of the circuit.
    Type: Grant
    Filed: September 17, 1973
    Date of Patent: November 2, 1976
    Assignee: Hewlett-Packard Company
    Inventor: George E. Bodway