Abstract: A method of fabricating a semiconductor device, includes the steps of forming gates in a cell region and in a peripheral region of a substrate, forming a polysilicon layer over an entire surface of the resultant structure, partially removing portions of the polysilicon layer in the cell region to maintain the polysilicon layer of a predetermined thickness in the cell region, removing the predetermined thickness of the polysilicon layer both in the cell and peripheral regions, so that the resultant structure includes exposed gates in the cell region but no exposed gates in the peripheral region, and forming an insulating layer over the resultant structure.

Abstract: A structural shape has an injection molded, three-dimensional substrate composed of an electrically insulating polymer, polymer studs planarly arranged on the underside of the substrate and co-formed during injection molding, outside terminals formed on the polymer studs by a solderable end surface, interconnections fashioned at least on the underside of the substrate that connect the outside terminals to inside terminals, and at least one chip arranged on the substrate and whose terminals are electrically conductively connected to the inside terminals. The structural shape is suitable for single, few or multi chip module and unites the advantages of a ball grid array with the advantages of MID technology (Molded Interconnection Devices). The manufacture and metallization of the polymer studs can take place with minimal additional outlay in the framework of the method steps already required in the MID technology.