Abstract: The embodiments described herein provide microelectromechanical systems (MEMS) devices, such as three-axis MEMS devices that can sense acceleration in three orthogonal axes (e.g., x-axis, y-axis, and z-axis). In general, the embodiments described can provide decoupling between the sense motions of all three axes from each other. This decoupling is facilitated by the use of an inner frame, and an outer frame, and the use of rotative spring elements combined with translatory spring elements that have asymmetric stiffness. Specifically, the translatory spring elements facilitate translatory motion in two directions (e.g., the x-direction and y-direction) and have an asymmetric stiffness configured to compensate for an asymmetric mass used to sense in the third direction (e.g., the z-direction).

Abstract: Provided is an image forming apparatus which includes a developer to develop an image and a developer contact medium of which a surface contacts the developer, wherein asperities with a density of about 4×108 to about 200×108 pcs/cm2 are formed to form roughness on the surface of the developer contact medium.

Abstract: A method for fabricating a thin film photovoltaic device. The method includes providing a substrate comprising an absorber layer and an overlying window layer. The substrate is loaded into a chamber and subjected to a vacuum environment. The vacuum environment is at a pressure ranging from 0.1 Torr to about 0.02 Torr. In a specific embodiment, a mixture of reactant species derived from diethylzinc species, water species and a carrier gas is introduced into the chamber. The method further introduces a diborane species using a selected flow rate into the mixture of reactant species. A zinc oxide film is formed overlying the window layer to define a transparent conductive oxide using the selected flow rate to provide a resistivity of about 2.5 milliohm-cm and less and an average grain size of about 3000 to 5000 Angstroms.

Abstract: The invention includes a semiconductor structure having U-shaped transistors formed by etching a semiconductor substrate. In an embodiment, the source/drain regions of the transistors are provided at the tops of pairs of pillars defined by crossing trenches in the substrate. One pillar is connected to the other pillar in the pair by a ridge that extends above the surrounding trenches. The ridge and lower portions of the pillars define U-shaped channels on opposite sides of the U-shaped structure, facing a gate structure in the trenches on those opposite sides, forming a two sided surround transistor. Optionally, the space between the pillars of a pair is also filled with gate electrode material to define a three-sided surround gate transistor. One of the source/drain regions of each pair extending to a digit line and the other extending to a memory storage device, such as a capacitor. The invention also includes methods of forming semiconductor structures.

Abstract: A multi-layered gate for use in a CMOS or CCD imager formed with a second gate at least partially overlapping it. The multi-layered gate is a complete gate stack having an insulating layer, a conductive layer, an optional silicide layer, and a second insulating layer, and has a second gate formed adjacent to it which has a second conductive layer that extends at least partially over the surface of the multi-layered gate. The multi-layered gate has improved insulation, thereby resulting in fewer shorts between the conductive layers of the two gates. Also disclosed are processes for forming the multi-layered gate and the overlapping gate.