Patents Examined by Wasseem Hamdan
  • Patent number: 6732645
    Abstract: In a first printing process in Steps S1 through S6, ink supply is controlled so that a measured printed density (Vn) is approximately equal to a first target density (V1). This provides a uniform amount of ink remaining on ink rollers after the first printing process. Thereafter, in a second printing process in Steps S7 through S11, printing is performed using a second target density (V2) lower than the first target density (V1). This provides a slightly reduced, uniform amount of ink remaining on the ink rollers. Thus, a novel method of presetting ink is provided which facilitates the formation of a distribution of the new amount of ink at the beginning of the next printing operation and which stabilizes the early start of printing.
    Type: Grant
    Filed: October 8, 2002
    Date of Patent: May 11, 2004
    Assignee: Dainippon Screen MFG., Co., Ltd.
    Inventors: Takaharu Yamamoto, Shigeo Murakami, Nobuhito Kohara, Kuniharu Okuda
  • Patent number: 6694874
    Abstract: A method is disclosed for providing a pictorial cancellation mark that may be applied to the postage indicia on a mailpiece. The pictorial cancellation originates as a digital image that is then printed through a printer on the mailpiece. This invention takes advantage of the technology now available in digital printing techniques to vary the pictorial cancellation through a variety of color, sizes, shapes, and images. Pictorial cancellations may thus be individualized for markets, applications, and unique purposes.
    Type: Grant
    Filed: September 4, 2002
    Date of Patent: February 24, 2004
    Assignee: The United States Postal Service
    Inventor: Khalid Hussain
  • Patent number: 6639221
    Abstract: A method and apparatus for aligning a charged particle beam with an aperture includes providing a hollow beam aperture device adapted for shaping a charged particle beam into a hollow charged particle beam. Then direct the charged particle beam through the aperture. Provide deflection coils for deflecting the charged particle beam relative to the aperture. Vary the current to the alignment deflection coils while measuring the aperture electrical current generated by charged particles reaching the hollow beam aperture as a function of the current to the alignment deflection coils. Then adjust the current in the alignment deflection coils based on the aperture electrical current to center the charged particle beam on the hollow beam aperture. Preferably, separate hollow beam and peripheral beam apertures with associated sensing and current are used to center the beam on respective ones of the apertures.
    Type: Grant
    Filed: January 18, 2002
    Date of Patent: October 28, 2003
    Assignee: Nikon Corporation
    Inventor: Shinichi Kojima
  • Patent number: 6518777
    Abstract: A method and an apparatus for measuring insulation resistance capable of removing the influences of piezoelectric noise which is occurring due to mechanical vibrations applied to an electronic component to measure the insulation resistance of the electronic component with high accuracy. In order to do so, a predetermined measured voltage is applied to the electronic component arranged in a position subjected to periodic mechanical vibrations from the outside to measure a current flowing through the electronic component. Then, the value of the measured current flowing through the electronic component is integrated over the period of the mechanical vibrations or over a time which is an integral multiple thereof. With this arrangement, a piezoelectric noise current can be cancelled and only a leakage current to be primarily measured can be extracted. Thus, by calculating the value of the insulation resistance from the value of the current, the insulation resistance can be detected with high accuracy.
    Type: Grant
    Filed: December 19, 2000
    Date of Patent: February 11, 2003
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Gaku Kamitani, Akihiro Hayashi, Koichi Teramura
  • Patent number: 6518741
    Abstract: An inversion in-phase component and a non-inversion in-phase component of a modulation signal inputted from a quadrature modulation section of a sample machine captured in a pair of signal lines, and an inversion quadrature component and a non-inversion quadrature component of the modulation signal, are computed by a pair of computers, respectively. In addition, these components are analog/digital converted at a pair of analog/digital converting sections, and then, are stored in a waveform storage memory. A modulation characteristics analyzing section performs predetermined computation processing of the storage data, thereby analyzing modulation characteristics of the modulation signal. A balance/imbalance switching section is provided at each one of the pair of signal lines, and the signal lines are grounded, whereby a state for transmitting a modulation signal of a balance transmission format is switched to a state for transmitting a modulation signal of an imbalance transmission format.
    Type: Grant
    Filed: June 21, 2001
    Date of Patent: February 11, 2003
    Assignee: Anritsu Corporation
    Inventor: Tomohisa Okada
  • Patent number: 6433557
    Abstract: A sensor and associated circuits are provided for on-line monitoring of the state of the high-voltage insulation in electrical equipment with capacitance tap. In this arrangement, both the power frequency signal and the radio frequency signals associated with partial discharge activity are sensed. These signals are transmitted from the sensor to remote monitoring instrumentation via one connecting cable. The sensor contains a surge arrester in parallel with a capacitor shunt, a radio frequency current transformer and a connecting circuit. The polarity terminal of the primary winding of the radio frequency current transformer is connected to the tap output. The non-polarity terminal is connected to the common connection point of the surge arrester and the capacitor shunt while the second terminals of these components are connected to the local ground.
    Type: Grant
    Filed: December 21, 2000
    Date of Patent: August 13, 2002
    Assignee: Eaton Corporation
    Inventors: Viktor S. Rashkes, Alexander Golubev
  • Patent number: 6373235
    Abstract: In one embodiment, a high-resolution measurement apparatus and method determine the position and motion of an object such as a human hand relative to a sensor array. Capacitance transferred to the array by the object within a sensor field produces minute phase changes in a fixed-frequency reference signal applied to the several elements of the array. The phase changes are measured by first heterodyning the phase-shifted reference signal with a second reference signal to obtain a low frequency intermediate signal, and then employing a phaselocked loop to multiply the phase information in the intermediate signal by orders of magnitude, thereby permitting the use of conventional methods to measure the resulting greatly magnified phase changes. Other embodiments provide direct digital measurement of unknown electrical properties, such as capacitance, inductance, and resistance.
    Type: Grant
    Filed: May 3, 2000
    Date of Patent: April 16, 2002
    Inventor: Clifford A. Barker
  • Patent number: 6300782
    Abstract: A system for testing semiconductor components includes a testing apparatus, such as a test carrier for discrete components, or a wafer prober for wafer sized components The system also includes an interconnect for electrically engaging the components. The interconnect includes a thinned substrate, and first contacts on the substrate for electrically engaging second contacts on the components. The thinned substrate has a thickness that is substantially less than a thickness of the components being tested. The thinned substrate can flex upon application of a biasing force by the testing apparatus, permitting the first contacts to move in the z-direction to accommodate variations in the planarity of the second contacts.
    Type: Grant
    Filed: June 4, 2001
    Date of Patent: October 9, 2001
    Assignee: Micron Technology, Inc.
    Inventors: David R. Hembree, Derek Gochnour
  • Patent number: 6275938
    Abstract: Untrusted executable code programs (applets or controls) are written in native, directly executable code. The executable code is loaded into a pre-allocated memory range (sandbox) from which references to outside memory are severely restricted by checks (sniff code) added to the executable code. Conventional application-program interface (API) calls in the untrusted code are replaced with translation-code modules (thunks) that allow the executable code to access the host operating system, while preventing breaches of the host system's security. Static links in the code are replaced by calls to thunk modules. When an API call is made during execution, control transfers to the thunk, which determines whether the API call is one which should be allowed to execute on the operating system.
    Type: Grant
    Filed: August 28, 1997
    Date of Patent: August 14, 2001
    Assignee: Microsoft Corporation
    Inventors: Barry Bond, Sudeep Bharati
  • Patent number: 6259267
    Abstract: A power-current measuring circuit 200 is structured such that two types of power supply circuits are selectively turned on in accordance with the number of chips which are formed on a wafer 60 and which must be measured. A power-current measuring circuit and a power-current detection device corresponding to the output are provided so that resolution accuracy required to perform measurement of the power current is maintained. A current-measuring-circuit selection circuit 56 enables outputs of the two types of the current measuring circuits to selectively be input to one conversion circuit. Therefore, a necessity for connecting the conversion circuit and its peripheral circuits to each of the current measuring circuit can be eliminated. As a result, the size of the circuit can be reduced.
    Type: Grant
    Filed: February 22, 2000
    Date of Patent: July 10, 2001
    Assignee: Ando Electric Co., Ltd.
    Inventor: Noritada Fujiwara
  • Patent number: 6232783
    Abstract: A method and apparatus for detecting contaminants in an aqueous flow. The method includes the steps of providing a conduit having at least one collection portion upon which is disposed a selective film, disposing the aqueous flow through the conduit, attracting contaminants to the collection portion such that they are bonded to the selective film, and detecting a contaminant, or contaminants, based upon a predetermined property of the plurality of contaminants bonded to the ion collection portion. The selective film may include a molecularly imprinted polymer, a crown ether, an antibody selective for biological contaminants, such as Giardia Lamblia and cryptosporidia, or for detecting organics such as dioxin or furan, a cyclodextrin, or a cyclophane.
    Type: Grant
    Filed: June 15, 1999
    Date of Patent: May 15, 2001
    Inventor: John H. Merrill
  • Patent number: 6065120
    Abstract: The present invention has been made in consideration of thin devices efficiently communicating ideas and transactions into data networks by using other devices with full functional user interface in the networks. According to one aspect of the present invention, the thin device exclusively controls the authentication of a rendezvous that is associated with a user account in a server. The thin device running a micro-browser provisions the rendezvous with a set of credential information in an authenticated and secure communication session so that the provisioning process is truly proprietary. To access the user account, the other devices equipped with well known browsers must submit the correct credential information to the rendezvous for verification in the server.
    Type: Grant
    Filed: December 9, 1997
    Date of Patent: May 16, 2000
    Assignee: Phone.com, Inc.
    Inventors: Andrew L. Laursen, Bruce K. Martin, Jr., Alain S. Rossmann
  • Patent number: 6061794
    Abstract: A system and method for performing secure peer-to-peer device communications on an I/O bus, such as a PCI bus, a Fiber Channel bus, an IEEE, 1394 bus or a Universal Serial Bus. The system includes a plurality of intelligent I/O devices, such as intelligent storage devices and/or controllers, communications devices, video devices and audio devices. The I/O devices perform peer-to-peer message and data transfers, thereby bypassing the operating system running on the computer's CPU. The intelligent I/O devices encrypt messages and data before transmitting them on the I/O bus and conversely decrypt the messages and data upon reception. The encryption provides secrecy and/or authentication of the sender. The devices use keys or passwords to encrypt/decrypt the data. The keys are stored in non-volatile memory in the devices and are distributed to the devices by the system BIOS at initialization time.
    Type: Grant
    Filed: September 30, 1997
    Date of Patent: May 9, 2000
    Assignee: Compaq Computer Corp.
    Inventors: Michael F. Angelo, Sompong P. Olarig, David R. Wooten, Dan J. Driscoll
  • Patent number: 6047247
    Abstract: There is provided a hot-carrier-delay-degradation estimation method of estimating, based on the actual operation of an LSI, deterioration in reliability thereof due to the influence of hot carriers. At a delay calculation step, there are calculated, for the cells of an LSI serving as the object of timing verification, delays, input slew and output load capacitances based on circuit information and a delay library containing delay parameters. At a delay degradation library generation step, there is generated a delay degradation library containing delay parameters at the time when the LSI has operated for a predetermined period of time.
    Type: Grant
    Filed: December 5, 1997
    Date of Patent: April 4, 2000
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Nobufusa Iwanishi, Yoshiyuki Kawakami
  • Patent number: 6026499
    Abstract: A scheme for restarting processes at distributed checkpoints in a client-server computer system, in which a fault in one client computer does not affect the server computer and the other client computers. In this scheme, a fault occurring in one computer among of a plurality of computers constituting a client-server computer system is detected while these plurality of computers are executing respective processes, and whether that one computer in which the fault is detected is a server computer or not is judged. Then, related processes executed on these plurality of computers are restarted when that one computer is judged as the server computer, whereas no process executed on these plurality of computers is restarted when that one computer is not judged as the server computer.
    Type: Grant
    Filed: January 30, 1998
    Date of Patent: February 15, 2000
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Toshio Shirakihara, Hideaki Hirayama, Kiyoko Sato, Tatsunori Kanai
  • Patent number: 6012149
    Abstract: A computer system includes a main processor and a supervisory processor. The main processor provides status signals when a fault condition exists and responds to control signals for fault recovery. The supervisory processor instantiates objects from a fault class in response to the status signals. Objects are polymorphic in that each object has substantially the same methods available at its interface though each object corresponds to a different fault. Methods accomplish fault recovery by providing the control signals. System operation exhibits fewer errors by the supervisory processor and system expansion is more easily accommodated with greater reuse of proven program code than possible with prior supervisory processor software.
    Type: Grant
    Filed: September 30, 1997
    Date of Patent: January 4, 2000
    Assignee: Bull HN Information Systems Inc.
    Inventor: Scott C. Stavran
  • Patent number: 6009541
    Abstract: A BIOS testing routine is initiated. Control is transferred to a diagnostic routine. The diagnostic routine performs a series of test in which a plurality of components are examined. In one embodiment, a random access/random data memory test is performed on a block of memory. Subsequently, control is transferred to the BIOS testing routine.
    Type: Grant
    Filed: October 1, 1997
    Date of Patent: December 28, 1999
    Assignee: Micron Electronics, Inc.
    Inventors: Ji-hwan Liu, Lowell Starr, Wei Wu
  • Patent number: 6009524
    Abstract: An improved system and method for FLASH BIOS upgrades which is particularly useful in network hubs. Each hub or node which is equipped with a FLASH memory is also equipped with a validation system, which ensures that a received FLASH upgrade is authorized and uncorrupted. Each set of instructions to be flashed is marked both with a vendor authorization digital signature and also a system administrator authorization digital signature, and BOTH digital signatures must be recognized by the validation system before the FLASH memory will be upgraded. Because digital signatures are used for security purposes, flash upgrades can be performed from any location on the network, and are not limited to an administrative node.
    Type: Grant
    Filed: August 29, 1997
    Date of Patent: December 28, 1999
    Assignee: Compact Computer Corp
    Inventors: Sompong P. Olarig, Michael F. Angelo
  • Patent number: 6003134
    Abstract: Multiple applications upon an IC microprocessor are protected with bi-modal CPU operation, either application or system mode, using an operation flag determining the mode and dependent upon a mode change interrupt which clears all working memory unnecessary to operation in the next mode. Access authorization setting program and data memory boundaries according to the particular custom command in comparison registers is utilized in application initialization. From application mode, data files are accessed only through a system subroutine. Request of an address beyond the territory assigned to the custom command utilized results in a hardware interrupt which clears all working memory and registers unnecessary to forward a status word indicating abnormal termination. Application completion forwards the result with a status word indicating successful completion.
    Type: Grant
    Filed: December 30, 1997
    Date of Patent: December 14, 1999
    Inventors: Chih-Cheng Kuo, Minwen Lo
  • Patent number: 6003133
    Abstract: A data processor (20) includes a firewall circuit (50) that monitors privilege level changes or transitions between privilege modes, such as from user mode and user space into supervisory or privileged mode and operating system space. The firewall circuit starts a timer (54) whenever a central processing unit (22) enters supervisor mode. If the timer (54) determines the passage of a predetermined time while the central processing unit remains continuously in supervisory mode without re-entering user mode, a predefined security policy is invoked. For example, the security policy may require at this point that the data processor (20) is to be reset. Different timer (54) time-out values and different security policies can be set for different types of privilege level changes. In one embodiment, a default time-out value provides protection for multiple types of privilege level changes.
    Type: Grant
    Filed: November 17, 1997
    Date of Patent: December 14, 1999
    Assignee: Motorola, Inc.
    Inventors: Claude Moughanni, William C. Moyer, Taimur Aslam