Patents Examined by William D. Thompson
  • Patent number: 6185620
    Abstract: A method and apparatus for transferring data from a host to a node through a fabric connecting the host to the node. A chip architecture is provided in which a protocol engine provides for on ship processing in transferring data such that frequent interrupts from various components within the chip may be processed without intervention from the host processor. Additionally, context managers are provided to transmit and receive data. The protocol engine creates a list of transmit activities, which is traversed by the context managers, which in turn execute the listed activity in a fashion independent from the protocol engine. In receiving data, the context managers provide a mechanism to process frames of data originating from various sources without requiring intervention from the protocol engine. When receiving data, the context managers are able to process frames from different sources, which arrive out of order.
    Type: Grant
    Filed: April 3, 1998
    Date of Patent: February 6, 2001
    Assignee: LSI Logic Corporation
    Inventors: David M. Weber, Timothy E. Hoglund, Stephen M. Johnson, John M. Adams, Mark A. Reber