Abstract: A method for reducing a thermal load on a switching element of an electronic fuse when switching on a load, wherein (a) a switching element is activated, (b) the switching element is deactivated and (c) the switching element is re-activated after reaching a set value of a switch-off duration, where steps (b) and (c) are repeated until an output voltage reaches a value that falls below a specified difference with respect to an input voltage of an electronic fuse or an output current reaches a specified duration current, where set values of a switch-on duration and/or switch-off current and the switch-off duration are maintained until new set values have been determined based on the output voltage, output current, and/or temperature, a pulse duty factor between the switch-on duration and the switch-off duration is adapted, and the specified maximum allowable temperature increase of the switching element is further observed.

Abstract: The present specification relates to a wireless power transmission device. The present specification provides a wireless power transmission device comprising: a power supply unit for supplying power to the wireless power transmission device; at least one first coil for transmitting power to a wireless power reception device; and first and second condensers configured so as to be connected respectively to different both ends of the power supply unit and the first coil.

Abstract: A device for low-power bidirectional wireless data telemetry includes: a coil unit configured to perform forward telemetry and back telemetry; a full-wave rectifier unit configured to convert an AC voltage into a DC voltage; a current modulator configured to change a magnetic field by altering a path of the AC current generated, when the back telemetry is performed; an energy storage configured to generate a reuse power using the AC current; and a LDO unit configured to generate a source voltage using the power output from the full-wave rectifier unit and the reuse power generated by the energy storage. Accordingly, since the back telemetry and the forward telemetry may be performed simultaneously and the wasted current is reused, the power required for back telemetry may be reduced.

Abstract: An IC chip can include a buffer and correction module that receives a set of multiphase clock signals at a given frequency, the buffer and correction module can include a differential skew detector that detects a skew between signals of the set of multiphase clock signals. The skew detector can include a set of SR latches. Differential clock signals of the set of multiphase clock signals are input into each SR latch, and the differential clock signals of the set of multiphase clock signals are set to be 180 degrees out of phase. A voltage difference between a DC component of a first output signal and a DC component of a second output signal of a respective SR latch in the set of SR latches varies as a function of the skew between the differential clock signals of the set of multiphase clock signals.

Abstract: Several embodiments of electrical circuit devices and systems with clock distortion calibration circuitry are disclosed herein. In one embodiment, an electrical circuit device includes an electrical circuit die having clock distortion calibration circuitry to calibrate a clock signal. The clock distortion calibration circuitry is configured to compare a first duty cycle of a first voltage signal of the clock signal to a second duty cycle of a second voltage signal of the clock signal. Based on the comparison, the clock distortion calibration circuitry is configured to adjust a trim value associated with at least one of the first and the second duty cycles of the first and the second voltage signals, respectively, to calibrate at least one of the first and the second duty cycles and account for duty cycle distortion encountered as the clock signal propagates through a clock tree of the electrical circuit device.

Abstract: A wireless power transmission device capable of reducing an output power of wireless power receiving device receiving power transmitted from a wireless power transmission device. The wireless power transmission device including: a DC (Direct Current)/DC converter; an inverter configured to convert output voltage of the DC/DC converter into AC voltage having driving frequency; a power transmission coil configured for the AC voltage to be supplied to from the inverter and configured to generate the AC magnetic field; a transmission-side resonance circuit including the power transmission coil; and control circuit configured to increase difference between a driving frequency of the inverter and a resonance frequency of the transmission-side resonance circuit when a predetermined condition is satisfied.

Abstract: A contactless power transmission apparatus includes a transmitter that includes a transmitter coil that supplies electric power to a receiver and a power supply circuit that supplies alternating current power to the transmitter coil. The receiver includes a resonant circuit including a receiver coil that receives electric power from the transmitter and a resonant capacitor connected in series to the receiver coil, a rectifier circuit that rectifies electric power output from the resonant circuit, and a coil connected in parallel to the resonant circuit between the resonant circuit and the rectifier circuit.

Abstract: A technique for wirelessly charging a wireless device using a charging beam transmitted by a base station in a wireless communication system is disclosed. A method implementation of the technique is performed by the base station and comprises receiving (S208), from the wireless device, feedback on charging quality observed by the wireless device, and adjusting (S212) the charging beam based on the feedback received from the wireless device.

Abstract: A wireless power system has a wireless power transmitting device and a wireless power receiving device. The devices in the wireless power system may communicate using in-band communication. The wireless power transmitting device may transmit data to the wireless power receiving device using frequency-shift keying (FSK) modulation. The wireless power receiving device may transmit data to the wireless power transmitting device using amplitude-shift keying (ASK) modulation. While transmitting data to the wireless power receiving device using FSK modulation, the wireless power transmitting device may monitor for ASK modulation from the wireless power receiving device. In response to detecting the ASK modulation from the wireless power receiving device, the wireless power transmitting device may abort the FSK data transmission and process the detected ASK modulation to receive data from the wireless power receiving device.

Abstract: A method and system are provided for controlling transfer switch operations in a power distribution system. The method and system involve monitoring an electrical parameter of an electrical signal from a first power source associated with supplying power to a load; determining whether the electrical parameter satisfies a parameter threshold; selecting to increment or decrement a count value in accordance with the determination; and responsive to determining that the count value satisfies a first count threshold, initiating a start signal to start operation of a second power source to supply power to the load. The electrical parameter can be voltage or frequency, or other parameter(s) from which a power quality of the electrical signal may be evaluated. The electrical signal can be a single or polyphase electrical signal.

Abstract: The present invention provides a fractional frequency divider, wherein the fractional frequency divider includes a plurality of registers, a control signal generator and a clock gating circuit. Regarding the plurality of registers, at least a portion of the registers are set to have values. The control signal generator is configured to generate a control signal based on an input clock signal and values in the at least a portion of the registers, wherein the control generator sequentially generates the control signal during each cycle of the input clock signal. The clock gating circuit is configured to refer to the control signal to mask or not mask the input clock signal to generate an output clock signal.

Abstract: A time signal generating circuit of a power converter and a control method thereof are provided. The time signal generating circuit includes a reference frequency generating circuit, an on-time circuit and a frequency tracking circuit. The reference frequency generating circuit provides a reference frequency signal. The on-time circuit provides an on-time signal according to a first reference signal and a second reference signal. The second reference signal is related to an output voltage of the power converter. The frequency tracking circuit is coupled to the reference frequency generating circuit and the on-time circuit, and compares frequencies of the reference frequency signal and the on-time signal within a default time to generate a tracking signal. The on-time circuit adjusts the second reference signal according to the tracking signal, so that the on-time circuit adjusts the frequency of the on-time signal.

Abstract: A method for reducing a thermal load on a switching element of an electronic fuse when switching on a load, wherein (a) a switching element is activated, (b) the switching element is deactivated and (c) the switching element is re-activated after reaching a set value of a switch-off duration, where steps (b) and (c) are repeated until an output voltage reaches a value that falls below a specified difference with respect to an input voltage of an electronic fuse or an output current reaches a specified duration current, where set values of a switch-on duration and/or switch-off current and the switch-off duration are maintained until new set values have been determined based on the output voltage, output current, and/or temperature, a pulse duty factor between the switch-on duration and the switch-off duration is adapted, and the specified maximum allowable temperature increase of the switching element is further observed.

Abstract: Systems and methods for operating a digital-to-analog converter (DAC) are described. In an example, a device can receive a digital input. The device can generate a clock signal having frequency in radio frequency (RF) range. The device can combine the digital input with the clock signal to generate a first voltage signal. The device can convert the first voltage signal into a second voltage signal having at least two phases. The device can convert the second voltage signal into a current signal. The device can distribute the current signal to at least one current mode DAC.

Abstract: A gate driver circuit for driving a gate-controlled switching device comprises a voltage monitor circuit portion arranged to produce a first value that is dependent on a time derivative (dv/dt) of a voltage applied across the gate-controlled switching device. A current monitor circuit portion is arranged to produce a second value that is dependent on a time derivative (di/dt) of a current through the gate-controlled switching device. A compensator is arranged to receive an alternating input signal (PWMref), the first value, and the second value, wherein the compensator modulates a magnitude and transition profile of the alternating input signal (PWMref) in response to the respective time derivatives of the voltage and the current, thereby generating a modulated control signal (PWMN). The gate driver circuit supplies the modulated control signal (PWMN) to the gate terminal of the gate-controlled switching device.

Abstract: A control circuit for controlling a power switch in a SMPS has a signal jittering circuit and a comparing circuit. The signal jittering circuit adds an overlapping signal into a current sensing signal indicative of current flowing through the power switch or into a current threshold signal, wherein the overlapping signal has a first frequency and an enveloping line of the overlapping signal has a second frequency, and wherein the second frequency is lower than the first frequency. The comparing circuit compares the current sensing signal and the current threshold signal, wherein when the current sensing signal is higher than the current threshold signal, the control circuit c turns off the power switch.

Abstract: An amplifier overload power limit circuit, system, and a method thereof comprising a monitoring of a current gain of a BJT based on a current detector and limiting power to the BJT based on the monitored current gain to prevent the BJT from driven into a saturation mode and the amplifier overdrive.

Abstract: The disclosure provides a power conversion circuit with a multi-function pin and a multi-function setting method thereof. The multi-function pin is coupled to an external setting circuit. The power conversion circuit includes a first function circuit, a second function circuit, and a judging circuit. The first function circuit is coupled to the multi-function pin. The second function circuit is coupled to the multi-function pin. The judging circuit is coupled to the multi-function pin, the first function circuit, and the second function circuit. The judging circuit provides a setting current to the multi-function pin, so that the external setting circuit generates a voltage according to the setting current. The judging circuit judges the type of external setting circuit according to voltage so as to activate the first function circuit or the second function circuit accordingly.

Abstract: The present invention provides a Miller clamp drive circuit, including a drive chip which includes an output terminal configured to output a driving signal, a clamp terminal, a power terminal and a controllable switch connected between the clamp terminal and the power terminal; a drive resistor, one terminal of which is connected to the output terminal of the drive chip and the other terminal of which is used to connect to a control electrode of a power switching transistor; and a Miller clamp circuit including a first voltage divider circuit which is connected between the other terminal of the drive resistor and the clamp terminal and configured to have a preset voltage drop, and a second voltage divider circuit connected between the clamp terminal and the power terminal. The Miller clamp drive circuit of the present invention increases the Miller clamp voltage and decreases the tailing time of the power switching transistor.

Abstract: A method for the PWM actuation of more than one HV component for converting the power required by the HV components, in which each HV component is actuated by means of an individual PWM control circuit, and to a device for carrying out the method, wherein individual PWM control circuits are provided for the PWM actuation of 2 . . . n HV components, and wherein means are provided for asymmetrically splitting the phase shifts of the individual PWM actuation provided by the PWM circuitry.