Patents Examined by William P Moore
  • Patent number: 6591395
    Abstract: A simple combinational logic circuit processes trace-back procedures for a Viterbi decoder instead of using ROM. The circuit includes a multiplexer, a shifter and an adder. A trace-back value is generated according to the trace-back information of a current state. The state value of the current state is shifted right by 2 bits. The shifted value and the trace-back value are added to obtain the state value of its prior state. 4-D symbols associated with each state transitions in all survivors for trace-back procedure are represented by 2-D symbols along with the differences between their coordinates.
    Type: Grant
    Filed: June 18, 2000
    Date of Patent: July 8, 2003
    Assignee: Silicon Integrated Systems Corporation
    Inventor: Shang-Ho Tsai