Patents Examined by Willy W Huaracha
  • Patent number: 9262193
    Abstract: A multi-tier platform-as-a-service (PaaS) deployment reduced to a single-tier architecture for development is disclosed. A method of the disclosure includes mapping multiple tiers of a PaaS system to a consolidated environment executable on a virtual machine (VM), wherein networking stacks of the VM maintain a separation between the multiple tiers in the consolidated environment, and providing the consolidated environment as a development instance of the PaaS system for execution on the VM, the consolidated environment facilitating testing of code changes to the PaaS system.
    Type: Grant
    Filed: November 30, 2012
    Date of Patent: February 16, 2016
    Assignee: Red Hat, Inc.
    Inventors: Matthew Hicks, Michael P. McGrath, Daniel C. McPherson
  • Patent number: 9256455
    Abstract: A method and system for managing a virtual computing system including a virtual machine (VM) configured to send an event to a host CPU executing a memory monitoring instruction. The virtual machine is configured to receive from a hypervisor a notification identifying an address range writeable by a virtual central processing unit (VCPU) associated with the virtual machine to send an event to a host central processing unit (CPU). The virtual machine is further configured to receive an instruction to write to the identified address range for sending an event to the host CPU. The VCPU of the virtual machine may then write data identifying an event for execution by the host CPU to the identified address range, without causing an exit to the hypervisor.
    Type: Grant
    Filed: November 20, 2012
    Date of Patent: February 9, 2016
    Assignee: Red Hat Isreal, Ltd.
    Inventors: Michael Tsirkin, Avi Kivity, Dor Laor
  • Patent number: 9251033
    Abstract: A method and apparatus for automatic provisioning steps using a physical computing block-based infrastructure platform and a virtualized environment is discussed to provide automatic elasticity. Running applications may be monitoring for increased workload, which may trigger a proactive and/or reactive response. The triggered proactive or reactive response includes executing a remediation action upon workloads exceeding set thresholds, as set by a pre-determined monitoring policy. The remediation actions may include the provisioning of additional virtual or physical computing resources to reduce the workload below the set threshold.
    Type: Grant
    Filed: June 29, 2012
    Date of Patent: February 2, 2016
    Assignee: VCE Company, LLC
    Inventor: Richard Kirchhofer
  • Patent number: 9253020
    Abstract: A method of binding a web service to a business application includes dynamically extending the executable code of the business application while the business application is being executed by a networked web service client device. The dynamic extension of the business application creates a persistent customizable web service interaction between the business application and a selected web service.
    Type: Grant
    Filed: June 11, 2009
    Date of Patent: February 2, 2016
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Anamitra Bhattacharyya, Boris Dozortsev, Seenivasan Chandrasekararaja, Sampathkumar Sriramadhesikan
  • Patent number: 9244717
    Abstract: A virtual computer system, including a plurality of virtual machines (VMs) running on one or more host computers, is configured to manage virtual disks in a manner to facilitate making copies of one or more virtual machines (VMs) by means of a method known as linked cloning. Techniques are disclosed for scanning a storage system to determine the set of VMs, identifying virtual disks associated with each VM, examining parent/child relationships among the virtual disks, and displaying the virtual disk hierarchy. Redundant virtual disks may be identified as the set of virtual disks that have exactly one child disk and that are not associated with a snapshot. Provisions for generating a relocate list to support migration of a linked clone may also be utilized.
    Type: Grant
    Filed: March 29, 2012
    Date of Patent: January 26, 2016
    Assignee: VMware, Inc.
    Inventors: Sandeep Srinivasa Rao Pissay, Vipin Balachandran
  • Patent number: 9229760
    Abstract: Reducing virtual memory power consumption during idle states in virtual memory systems comprising tracking the topology of the system memory by the system hypervisor and operating system running on any selected virtual machine hosted by the system hypervisor. The idle states in the system memory are dynamically monitored and then the power consumption states in the system memory are dynamically reduced through the interaction of the hypervisor and the operation system running on the selected virtual machine.
    Type: Grant
    Filed: November 12, 2012
    Date of Patent: January 5, 2016
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Ankita Garg, Dipankar Sarrna, Vaidyanathan Srinivasan
  • Patent number: 9207997
    Abstract: Apparatus, systems, and methods may operate to construct a memory barrier to protect a thread-specific use counter by serializing parallel instruction execution. If a reader thread is new and a writer thread is not waiting to access data to be read by the reader thread, the thread-specific use counter is created and associated with a read data structure and a write data structure. The thread-specific use counter may be incremented if a writer thread is not waiting. If the writer thread is waiting to access the data after the thread-specific use counter is created, then the thread-specific use counter is decremented without accessing the data by the reader thread. Otherwise, the data is accessed by the reader thread and then the thread-specific use counter is decremented. Additional apparatus, systems, and methods are disclosed.
    Type: Grant
    Filed: October 31, 2007
    Date of Patent: December 8, 2015
    Assignee: Novell, Inc.
    Inventor: Pradeep Kumar Rathi
  • Patent number: 9207980
    Abstract: Technologies are generally described for a multi-processor core and a method for transferring threads in a multi-processor core. In an example, a multi-core processor may include a first group including a first core and a second core. A first sum of the operating frequencies of the cores in the first group corresponds to a first total operating frequency. The multi-core processor may further include a second group including a third core. A second sum of the operating frequencies of the cores in the second group may correspond to a second total operating frequency that is substantially the same as the first total operating frequency. A hardware controller may be configured in communication with the first, second and third core. A memory may be configured in communication with the hardware controller and may include an indication of at least the first group and the second group.
    Type: Grant
    Filed: May 12, 2015
    Date of Patent: December 8, 2015
    Assignee: Empire Technology Development LLC
    Inventor: Yan Solihin
  • Patent number: 9201678
    Abstract: A method is provided for placing a virtual machine on a target virtual machine manager out of multiple virtual machine managers. System management software is connected to the virtual machine managers and selects the target virtual machine manager for placing the virtual machine. The method includes: the system management software creating a memory profile for all virtual machines hosted on the multiple virtual machine managers, the system management software evaluating probabilities for samepage mapping of the virtual machine to be placed on the multiple virtual machine managers based on the memory profiles of the virtual machines, the system management software selecting under consideration of the probabilities for samepage mapping a most appropriate virtual machine manager as the target virtual machine manager, and the system management software placing the virtual machine on the target virtual machine manager.
    Type: Grant
    Filed: November 9, 2011
    Date of Patent: December 1, 2015
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Utz Bacher, Einar Lueck, Stefan Raspl, Thomas Spatzier
  • Patent number: 9183027
    Abstract: Processing within a computing environment that supports pageable guests is facilitated. Processing is facilitated in many ways, including, but not limited to, associating guest and host state information with guest blocks of storage; maintaining the state information in control blocks in host memory; enabling the changing of states; and using the state information in management decisions. In one particular example, the guest state includes an indication of usefulness and importance of memory contents to the guest, and the host state reflects the ease of access to memory contents. The host and guest state information is used in managing memory of the host and/or guests.
    Type: Grant
    Filed: June 5, 2014
    Date of Patent: November 10, 2015
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Ingo Adlung, Jong Hyuk Choi, Hubertus Franke, Lisa C. Heller, William A. Holder, Ray Mansell, Damian L. Osisek, Randall W. Philley, Martin Schwidefsky, Gustav E. Sittmann, III
  • Patent number: 9176767
    Abstract: In a data center computing system, multiple nested hypervisors are run, including an outer hypervisor and at least one inner hypervisor running as a virtual machine on top of the outer hypervisor. A guest operating system is run as a virtual machine in the innermost hypervisor. An emulated network interface card device is executed in all hypervisors. An extender component is executed in the outer hypervisor and an extender component is executed in the inner hypervisors such that the extender components in the outer hypervisor and in the inner hypervisors are architecturally cascaded. An interface for the guest operating system is assigned to the emulated network interface card device in each of the outer hypervisor and the inner hypervisors to enable network communications to bypass the outer hypervisor and the inner hypervisors.
    Type: Grant
    Filed: April 11, 2013
    Date of Patent: November 3, 2015
    Assignee: Cisco Technology, Inc.
    Inventor: Cesare Cantu
  • Patent number: 9158713
    Abstract: A system and method are provided for evenly distributing central processing unit (CPU) packet processing workloads. The method accepts packets for processing at a port hardware module port interface. The port hardware module supplies the packets to a direct memory access (DMA) engine for storage in system memory. The port hardware module also supplies descriptors to a mailbox. Each descriptor identifies a corresponding packet. The mailbox has a plurality of slots, and loads the descriptors into empty slots. There is a plurality of CPUs, and each CPU fetches descriptors from assigned slots in the mailbox. Then, each CPU processes packets in the system memory in the order in which the associated descriptors are fetched. A load balancing module estimates each CPU workload and reassigns mailbox slots to CPUs in response to unequal CPU workloads.
    Type: Grant
    Filed: May 3, 2010
    Date of Patent: October 13, 2015
    Assignee: Applied Micro Circuits Corporation
    Inventors: Keyur Chudgar, Vinay Ravuri, Loc Nhin Ho
  • Patent number: 9158584
    Abstract: A method for distributing execution of a computer program to a plurality of hardware architectures of different types including: analyzing the computer program to identify a plurality of execution boundaries; selecting one or more execution boundaries from the plurality of execution boundaries; linking the computer program to the selected one or more execution boundaries; executing the computer program with linked execution boundaries; saving a hardware agnostic state of the execution of the computer program, when the execution encounters a boundary from the selected one or more execution boundaries; and transmitting the hardware agnostic state to a remote hardware architecture to be executed on the remote hardware architecture, responsive to the hardware agnostic state.
    Type: Grant
    Filed: April 3, 2013
    Date of Patent: October 13, 2015
    Assignee: RAYTHEON CYBER PRODUCTS, LLC
    Inventors: Robert Martz, David Matthews, Joshua Edmison
  • Patent number: 9152472
    Abstract: A load distribution system for allocating a job to one of a plurality of arithmetic devices includes a temperature data acquirer, a candidate selector, and a job allocator. The temperature data acquirer acquires temperature data indicating temperature of each of the plurality of arithmetic devices. The candidate selector selects at least one of the plurality of arithmetic devices as a candidate for a device to which the job is to be allocated. The job allocator allocates the job to the selected candidate.
    Type: Grant
    Filed: March 7, 2011
    Date of Patent: October 6, 2015
    Assignee: FUJITSU LIMITED
    Inventors: Satoshi Kazama, Yoshiyasu Nakashima
  • Patent number: 9141547
    Abstract: An atomic transaction includes one or more memory access operations that are completed atomically. A Best-Effort Transaction (BET) system makes its best effort to complete each atomic transaction without guaranteeing completion of all atomic transactions. When an atomic transaction is aborted, BET may provide software with appropriate runtime information such as cause of the abortion. With proper coherence layer enhancements, BET can be implemented efficiently for multiprocessor systems, using caches as buffers for data accessed by atomic transactions. Furthermore, with appropriate fairness support, forward progress can be guaranteed for atomic transactions that incur no buffer overflow.
    Type: Grant
    Filed: January 3, 2008
    Date of Patent: September 22, 2015
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventor: Xiaowei Shen
  • Patent number: 9141426
    Abstract: A processor is described that includes a processing core and a plurality of counters for the processing core. The plurality of counters are to count a first value and a second value for each of multiple threads supported by the processing core. The first value reflects a number of cycles at which a non sleep state has been requested for the first value's corresponding thread, and, a second value that reflects a number of cycles at which a non sleep state and a highest performance state has been requested for the second value's corresponding thread. The first value's corresponding thread and the second value's corresponding thread being a same thread.
    Type: Grant
    Filed: September 28, 2012
    Date of Patent: September 22, 2015
    Assignee: Intel Corporation
    Inventors: Malini K. Bhandaru, Matthew M. Bace, A Leonard Brown, Ian M. Steiner, Vivek Garg, Eric Dehaemer, Scott P. Bobholz
  • Patent number: 9135042
    Abstract: To provision a secure customer domain in a virtualized multi-tenant environment, a virtual machine (VM) is configured for a customer in the customer domain. A first, second, and third virtual network interfaces (VNICs) are configured in the VM. The first VNIC has a first network address within a first address range selected for the customer domain and enables an application on the VM to access a second application in a second VM in the customer domain. The second VNIC enables a third application outside the customer domain to access the VM in the customer domain. The second VNIC is configured to use an addressing specification used by a server of the third application. The third VNIC enables access from the first application to a fourth application executing outside the customer domain. The third VNIC is configured to use an addressing specification used by a server of the fourth application.
    Type: Grant
    Filed: June 13, 2013
    Date of Patent: September 15, 2015
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Sean Donnellan, Robert K. Floyd, III, Robert P. Monaco, Holger Mueller, Joseph D. Robinson
  • Patent number: 9135077
    Abstract: Methods and systems are provided for graphics processing unit optimization via wavefront reforming including queuing one or more work-items of a wavefront into a plurality of queues of a compute unit. Each queue is associated with a particular processor within the compute unit. A plurality of work passes are performed. A determination is made which of the plurality of queues are below a threshold amount of work-items. Remaining one or more work-items from the queues with remaining ones of the work-items are redistributed to the below threshold queues. A subsequent work pass is performed. The, repeating of the determining, redistributing, and performing the subsequent work pass is done until all the queues are empty.
    Type: Grant
    Filed: March 16, 2012
    Date of Patent: September 15, 2015
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Michael L. Schmit, Radhakrishna Giduthuri
  • Patent number: 9116759
    Abstract: Techniques are disclosed that include a computer-implemented method including transmitting a message in response to a predetermined event through a process stage including at least first and second processes being executed as one or more tasks, the message instructing the abortion of the executing of the one or more tasks, and initiating abortion of execution of the one or more tasks by the one or more of the processes on receiving the messages.
    Type: Grant
    Filed: February 18, 2011
    Date of Patent: August 25, 2015
    Assignee: Ab Initio Technology LLC
    Inventors: Bryan Phil Douros, Joseph Skeffington Wholey, III
  • Patent number: 9119035
    Abstract: In one embodiment, an illustrative technique determines when an end-user is within a specified proximity of a client device configured to provide an interface to a virtual machine. In response to the end-user being within the specified proximity of the client device, the technique may then allocate data center resources for the virtual machine.
    Type: Grant
    Filed: May 22, 2012
    Date of Patent: August 25, 2015
    Assignee: Cisco Technology, Inc.
    Inventors: John Monaghan, Michael A. Dews, Subhasri Dhesikan, Manish S. Mittal