Patents Examined by Yasser A Abdelaziz
-
Patent number: 12096646Abstract: A display device includes a display module, a window disposed above the display module, an optical film disposed between the display module and the window, an adhesive layer, and a refractive index matching pattern. The window includes a base substrate and a bezel pattern overlapping with the base substrate and defining a first transmissive area and a second transmissive area isolated from the first transmissive area in a plane view. The optical film includes a first open area defined therein to correspond to the second transmissive area. The adhesive layer couples the window with the optical film. The refractive index matching pattern is disposed in the first open area and has a refractive index of about 90% to about 110% of the adhesive layer. The first open area is defined as an area in which the optical film is not disposed.Type: GrantFiled: June 10, 2021Date of Patent: September 17, 2024Assignee: Samsung Display Co., Ltd.Inventors: Jeongwoo Moon, Kyoujong Park, Youngju Park, JinYoung Lee
-
Patent number: 12089401Abstract: A preparation method of a semiconductor structure includes: providing a base; forming several bit lines arranged in parallel and at intervals on the base, which extend in a first direction; forming capacitor contact material layers between adjacent bit lines, upper surfaces of which are lower than upper surfaces of the bit lines; forming filling medium layers on the capacitor contact material layers; forming several first mask patterns arranged in parallel and at intervals on the filling medium layers and the bit lines, which extend in a second direction that intersects with the first direction; patterning the filling medium layers based on the first mask patterns to form several grooves in the filling medium layers; forming second mask patterns in the grooves; and patterning the capacitor contact material layers based on the second mask patterns to form several cylindrical capacitor contact structures arranged in parallel and at intervals.Type: GrantFiled: January 14, 2022Date of Patent: September 10, 2024Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.Inventor: Jingwen Lu
-
Patent number: 12080598Abstract: A method for preparing a semiconductor device structure includes forming a first dielectric layer over a semiconductor substrate; forming a first conductive plug in the first dielectric layer; forming a polysilicon layer covering the first dielectric layer and the first conductive plug; transforming a portion of the polysilicon layer into a silicide portion; forming a second conductive plug directly over the silicide portion; and forming a second dielectric layer surrounding the second conductive plug.Type: GrantFiled: November 8, 2021Date of Patent: September 3, 2024Assignee: NANYA TECHNOLOGY CORPORATIONInventor: Chun-Cheng Liao
-
Patent number: 12058884Abstract: Provided are a display panel and display device. The geometric center of the display region in the display panel is configured as a first center. Circles centered at the first center are configured as first circles. Along a direction in which a radius of any one of the first circles points away from the first center, the offsets of the geometric centers of multiple color filters relative to the light-emitting centers of multiple light-emitting elements and away from the first center increase gradually, and the volumes of multiple micro-lenses increase gradually.Type: GrantFiled: August 17, 2021Date of Patent: August 6, 2024Assignee: SeeYA Optronics Co., Ltd.Inventors: Liyuan Luo, Run Yang
-
Patent number: 12054382Abstract: A micro-electromechanical-system (MEMS) device may be formed to include an anti-stiction polysilicon layer on one or more moveable MEMS structures of a device wafer of the MEMS device to reduce, minimize, and/or eliminate stiction between the moveable MEMS structures and other components or structures of the MEMS device. The anti-stiction polysilicon layer may be formed such that a surface roughness of the anti-stiction polysilicon layer is greater than the surface roughness of a bonding polysilicon layer on the surfaces of the device wafer that are to be bonded to a circuitry wafer of the MEMS device. The higher surface roughness of the anti-stiction polysilicon layer may reduce the surface area of the bottom of the moveable MEMS structures, which may reduce the likelihood that the one or more moveable MEMS structures will become stuck to the other components or structures.Type: GrantFiled: April 28, 2023Date of Patent: August 6, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Hsi-Cheng Hsu, Kuo-Hao Lee, Jui-Chun Weng, Ching-Hsiang Hu, Ji-Hong Chiang, Lavanya Sanagavarapu, Chia-Yu Lin, Chia-Chun Hung, Jia-Syuan Li, Yu-Pei Chiang
-
Patent number: 12046676Abstract: A semiconductor device comprising a semiconductor channel, an epitaxial structure coupled to the semiconductor channel, and a gate structure electrically coupled to the semiconductor channel. The semiconductor device further comprises a first interconnect structure electrically coupled to the epitaxial structure and a dielectric layer that contains nitrogen. The dielectric layer comprises a first portion protruding from a nitrogen-containing dielectric capping layer that overlays either the gate structure or the first interconnect structure.Type: GrantFiled: August 30, 2021Date of Patent: July 23, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Yu-Lien Huang, Yi-Shan Chen, Kuan-Da Huang, Han-Yu Lin, Li-Te Lin, Ming-Huan Tsai
-
Patent number: 12029047Abstract: The present application relates to a semiconductor structure and its forming method. The semiconductor structure comprises a substrate; a first transistor, including a first channel region disposed within the substrate, and a first end disposed at surface of the substrate, the first end being adapted to connect with a first-type storage cell; and a second transistor, including a second channel region disposed within the substrate, and a second end disposed at surface of the substrate, the second end being adapted to connect with a second-type storage cell, the first channel region and the second channel region having different areas.Type: GrantFiled: January 11, 2022Date of Patent: July 2, 2024Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.Inventors: Yiming Zhu, Xiaoguang Wang