Abstract: An electro-optical device includes: a first light emitting element including an electrode and a first reflective layer disposed apart from the electrode by a first optical distance, a second light emitting element including the electrode and a second reflective layer disposed apart from the electrode by a second optical distance, a first microlens configured such that light emitted from the first light emitting element is incident on the first microlens, and a second microlens configured such that light emitted from the second light emitting element is incident on the second microlens, wherein a full width at half maximum of a spectrum of a first color light corresponding to the first optical distance is different from a full width at half maximum of a spectrum of a second color light corresponding to the second optical distance, and a curvature of the first microlens is smaller than a curvature of the second microlens.

Abstract: A method of manufacturing a MEMS device. The MEMS device has a cavity in which a beam will move to change the capacitance of the device. After most of the device build-up has occurred, sacrificial material is removed to free the beam within the MEMS device cavity. Thereafter, exposed ruthenium contacts are exposed to fluorine to either: dope exposed ruthenium and reduce surface adhesive forces, form fluorinated Self-Assembled Monolayers on the exposed ruthenium surfaces, deposit a nanometer passivating film on exposed ruthenium, or alter surface roughness of the ruthenium. Due to the fluorine treatment, low resistance, durable contacts are present, and the contacts are less susceptible to stiction events.

Abstract: A method of forming a semiconductor structure includes following operations. A memory layer is formed over the first gate electrode. A channel layer is formed over the memory layer. A first SUT treatment is performed. A second dielectric layer is formed over the memory layer and the channel layer. A source electrode and a drain electrode are formed in the second dielectric layer. A temperature of the first SUT treatment is less than approximately 400° C.

Abstract: An array substrate and a display device are disclosed. The array substrate includes a base substrate, a first conductive layer, a second conductive layer, and a third conductive layer. The first conductive layer is located on a side of the base substrate and includes a first conductive portion for forming a gate of a drive transistor and a second conductive portion for forming a first electrode of a capacitor; the second conductive layer is arranged on a side of the first conductive layer away from the base substrate, and includes a third conductive portion for forming a second electrode of the capacitor, and an orthographic projection of the third conductive portion on the base substrate and an orthographic projection of the second conductive layer on the base substrate at least partially overlap.

Abstract: An electronic structure includes a first substrate having a first under bump metallization (UBM) region and a second UBM region formed thereon. One or more solder bumps is deposited onto the first UBM region. A downstop formed on the second UBM region is wider, shallower and more rigid than any one of the solder bumps formed on the first UBM region. A second substrate is joined to the first substrate by the one or more solder bumps located on the first UBM region, and a height of the downstop limits a distance between at least one of the first substrate and the second substrate, or between an object and at least one of the first substrate and the second substrate.

Abstract: A microstructure may be provided by forming a metal layer such as a molybdenum layer over a substrate. An aluminum nitride layer is formed on a top surface of the metal layer. A surface portion of the aluminum nitride layer is converted into a continuous aluminum oxide-containing layer by oxidation. A dielectric spacer layer may be formed over the continuous aluminum oxide-containing layer. Contact via cavities extending through the dielectric spacer layer, the continuous aluminum oxide containing layer, and the aluminum nitride layer and down to a respective portion of the at least one metal layer may be formed using etch processes that contain a wet etch step while suppressing formation of an undercut in the aluminum nitride layer. Contact via structures may be formed in the contact via cavities. The microstructure may include a micro-electromechanical system (MEMS) device containing a piezoelectric transducer.

Abstract: An electronic device includes a first electronic unit and a second electronic unit. The first electronic unit includes a first light emitting element and a first light conversion layer. The first electronic unit emits a first light having a first spectrum, the first spectrum has a first intensity, and the first intensity is a maximum intensity of the first spectrum. The second electronic unit includes a second light emitting element and a second light conversion layer. The second electronic unit emits a second light having a second spectrum, the first light and the second light have different colors, the second spectrum has a second intensity in a range from 300 nm to 460 nm, the second intensity is a maximum intensity in the range from 300 nm to 460 nm of the second spectrum, and the first intensity is greater than the second intensity.

Abstract: A display device with less display unevenness is provided. The display device includes a first layer and a second layer over the first layer; the first layer includes first circuits arranged in m rows and n columns; the second layer includes pixel blocks arranged in the m rows and the n columns; the pixel blocks each comprise pixels arranged in a rows and b columns; the pixel block includes a first wiring and a second wiring electrically connected to the pixel; the first wiring and the second wiring included in the pixel block in the i-th row and the j-th column are each electrically connected to the first circuit in the i-th row and the j-th column; the first wiring has a function of supplying an input signal from the first circuit to the pixel; and the second wiring has a function of supplying an output signal from the pixel to the first circuit.

Abstract: A pixel includes a first bank pattern and a second bank pattern disposed on a base layer; a first electrode and a second electrode disposed on the first bank pattern and the second bank pattern, and spaced apart from each other; a light emitting element disposed between the first electrode and the second electrode, and including a first end electrically connected to the first electrode, and a second end electrically connected to the second electrode; and at least one insulating layer overlapping the light emitting element and at least one of the first electrode and the second electrode. The at least one insulating layer includes at least one of a first opening adjacent to the first end of the light emitting element and a second opening adjacent to the second end of the light emitting element.

Abstract: The present disclosure provides a semiconductor device, a manufacturing method, and electronic equipment. The semiconductor device including: a substrate; an interface, for generating two-dimensional charge carrier gas; a first electrode and a second electrode; and a first semiconductor layer of a first type doping formed on the substrate, wherein first regions and a second region are formed in the first semiconductor layer, wherein in the first regions, the dopant atoms of the first type do not have electrical activity, and in the second region, the dopant atoms of the first type have electrical activity; and the second region includes a portion coplanar with the first regions.

Abstract: A display device includes a display module, a window disposed above the display module, an optical film disposed between the display module and the window, an adhesive layer, and a refractive index matching pattern. The window includes a base substrate and a bezel pattern overlapping with the base substrate and defining a first transmissive area and a second transmissive area isolated from the first transmissive area in a plane view. The optical film includes a first open area defined therein to correspond to the second transmissive area. The adhesive layer couples the window with the optical film. The refractive index matching pattern is disposed in the first open area and has a refractive index of about 90% to about 110% of the adhesive layer. The first open area is defined as an area in which the optical film is not disposed.

Abstract: A preparation method of a semiconductor structure includes: providing a base; forming several bit lines arranged in parallel and at intervals on the base, which extend in a first direction; forming capacitor contact material layers between adjacent bit lines, upper surfaces of which are lower than upper surfaces of the bit lines; forming filling medium layers on the capacitor contact material layers; forming several first mask patterns arranged in parallel and at intervals on the filling medium layers and the bit lines, which extend in a second direction that intersects with the first direction; patterning the filling medium layers based on the first mask patterns to form several grooves in the filling medium layers; forming second mask patterns in the grooves; and patterning the capacitor contact material layers based on the second mask patterns to form several cylindrical capacitor contact structures arranged in parallel and at intervals.

Abstract: A method for preparing a semiconductor device structure includes forming a first dielectric layer over a semiconductor substrate; forming a first conductive plug in the first dielectric layer; forming a polysilicon layer covering the first dielectric layer and the first conductive plug; transforming a portion of the polysilicon layer into a silicide portion; forming a second conductive plug directly over the silicide portion; and forming a second dielectric layer surrounding the second conductive plug.

Abstract: A micro-electromechanical-system (MEMS) device may be formed to include an anti-stiction polysilicon layer on one or more moveable MEMS structures of a device wafer of the MEMS device to reduce, minimize, and/or eliminate stiction between the moveable MEMS structures and other components or structures of the MEMS device. The anti-stiction polysilicon layer may be formed such that a surface roughness of the anti-stiction polysilicon layer is greater than the surface roughness of a bonding polysilicon layer on the surfaces of the device wafer that are to be bonded to a circuitry wafer of the MEMS device. The higher surface roughness of the anti-stiction polysilicon layer may reduce the surface area of the bottom of the moveable MEMS structures, which may reduce the likelihood that the one or more moveable MEMS structures will become stuck to the other components or structures.

Abstract: Provided are a display panel and display device. The geometric center of the display region in the display panel is configured as a first center. Circles centered at the first center are configured as first circles. Along a direction in which a radius of any one of the first circles points away from the first center, the offsets of the geometric centers of multiple color filters relative to the light-emitting centers of multiple light-emitting elements and away from the first center increase gradually, and the volumes of multiple micro-lenses increase gradually.

Abstract: A semiconductor device comprising a semiconductor channel, an epitaxial structure coupled to the semiconductor channel, and a gate structure electrically coupled to the semiconductor channel. The semiconductor device further comprises a first interconnect structure electrically coupled to the epitaxial structure and a dielectric layer that contains nitrogen. The dielectric layer comprises a first portion protruding from a nitrogen-containing dielectric capping layer that overlays either the gate structure or the first interconnect structure.

Abstract: The present application relates to a semiconductor structure and its forming method. The semiconductor structure comprises a substrate; a first transistor, including a first channel region disposed within the substrate, and a first end disposed at surface of the substrate, the first end being adapted to connect with a first-type storage cell; and a second transistor, including a second channel region disposed within the substrate, and a second end disposed at surface of the substrate, the second end being adapted to connect with a second-type storage cell, the first channel region and the second channel region having different areas.