Abstract: A method for locating and isolating a failed node of an electromechanical management bus in a communication device. The method includes, in a communication process, an SHMC in operation records communication states of electromechanical management buses; the SHMC in operation performs calculation and analysis operations on data associated with the communication states, and determines whether there is an irrecoverable communication abnormality in a corresponding bus; if so, the SHMC sends, by means of a normal electromechanical management bus, a command to an electromechanical management node subordinate to the abnormal electromechanical management bus, such that the electromechanical management node controls a corresponding mechanical switch of the bus, coordinates respective nodes of the abnormal electromechanical management bus to conduct mutual communication tests with each other, locates a failed node, and returns location information of the failed node.

Abstract: A memory system may comprise a plurality of data strobe transfer paths assigned to a plurality of data transfer paths such that each of the plurality of data strobe transfer paths may be shared by the plurality of data transfer paths. At least one selected data strobe transfer path is selected and data signals transferred through the plurality of data transfer paths are sampled using at least one data strobe signal transferred through the selected data strobe transfer path. Reliability of data communication is enhanced through a redundant data strobe scheme by assigning a plurality of data strobe transfer paths to a plurality of data transfer paths such that the plurality of data strobe transfer paths may be shared by the plurality of data transfer paths.

Abstract: Provided are a computer program product, system, and method for using a track format code in a cache control block for a track in a cache to process read and write requests to the track in the cache. A track format table associates track format codes with track format metadata. A determination is made as to whether the track format table has track format metadata matching track format metadata of a track staged into the cache. A determination is made as to whether a track format code from the track format table for the track format metadata in the track format table matches the track format metadata of the track staged. A cache control block for the track being added to the cache is generated including the determined track format code when the track format table has the matching track format metadata.

Abstract: A storage server receives a control signal indicating that a specific storage device of a plurality of storage devices housed by a specific storage media tray has failed. The storage media tray is in turn housed by the specific storage server, which can house many such trays. In responsive to receiving the control signal, the server activates a visual fault indicator on an external display panel, indicating that the storage server contains a storage media tray housing a failed storage device. An external visual indicator on the specific storage media tray is activated to indicate that the specific storage media tray houses a failed storage device. The specific storage media tray activates an internal visual indicator identifying the specific storage device which has failed in the specific storage media tray. When the specific failed storage device has been replaced with a working storage device, the indicators are deactivated.

Abstract: A method begins by a processing module determining, by a first storage unit, that a storage growth rate is unfavorable for the first storage unit over an estimated time frame of reallocating at least a portion of encoded data slices stored in the first storage unit to one or more additional storage units. The method continues with the processing module when the storage growth rate is unfavorable, selecting an unfavorable growth rate abatement approach to include prioritizing new deletes and outgoing allocations such that estimated required storage capacity is less than available storage capacity of the first storage unit for the estimated time frame of the reallocation of the at least a portion of encoded data slices. The method continues with the processing module facilitating implementation of the unfavorable growth rate abatement approach.

Abstract: An automated test equipment (ATE) system includes a plurality of test blades each coupled to a test blade connector and mounted on a circular track; a central reference clock (CRC) having an origin point at a center of the circle; and a clock/sync connector coupled to the CRC through a zero skew clock connection to one or more sync buses, wherein each instrument utilizes the CRC to coordinate its testing process with another instrument.

Abstract: A device includes a memory device and a controller. The memory device includes read/write circuitry and a plurality of memory dies. The controller is coupled to the memory device. The controller is configured to, responsive to determining that at least one storage element of a first die of the plurality of memory dies has a characteristic indicative of an aging condition, increase the temperature of the first die by performing memory operations on the first die until detecting a condition related to the temperature.

Abstract: A system, includes: a distributed cache that stores state information for a plurality of configuration items (CIs). Management, instrumentation, and discovery (MID) servers form a cluster, each of the MID servers including one or more processors that receive, from the distributed cache, a subset of the state information associated with assigned CIs and perform a statistical analysis on the subset of the state information.

Abstract: A first device comprises: a memory configured to store a first sub-graph that is part of a distributed graph associated with a distributed graph processing network; a processor coupled to the memory and configured to: process the first sub-graph; and save, independently of a second device in the distributed graph processing network, a first snapshot of a first execution state of the first device at a first iteration time; and a transmitter coupled to the processor and configured to transmit the first snapshot to the second device or to a third device.

Abstract: Disclosed herein is an improved local analytics device that includes a single-board computer with a high-capacity processing unit, a remote network interface configured to wirelessly communicate with a remote computing system, a local network interface configured to wirelessly communicate with a remote computing system, a secondary power source, and an asset interface that may include (i) a communication connector that enables the local analytics device to be coupled to the asset's on-board systems via a single cable that carries both data and power, (ii) an asset communication subsystem configured to manage data communication with an asset's on-board systems, and (iii) a power management subsystem configured to receive and manage power from the asset's on-board systems.

Abstract: A system for automated testing of functionally complex systems, comprising a test manager, a test execution module, and a correlation engine, is disclosed. The test manager module causes tests to be executed by the test execution engine, and on detection of an anomalous test result, the test manager module at least causes additional testing to be performed and causes the correlation engine module to analyze the results of at least some of the additional testing in order to isolate at least one component exhibiting anomalous behavior.

Abstract: Systems, methods and apparatuses can present recovery of a log-structured file system. Embodiments can provide sending a request to a cloud store for backup data. The set of backup data received from the cloud store can comprise a set of data and metadata objects. The set of metadata objects can be read in a logical order. Each metadata object can be written from the set of data and metadata objects into block storage of the log-structured file system.

Abstract: Higher-level redundancy information computation enables a Solid-State Disk (SSD) controller to provide higher-level redundancy capabilities to maintain reliable operation in a context of failures of non-volatile (e.g. flash) memory elements during operation of an SSD implemented in part by the controller. For example, a first computation is an XOR, and a second computation is a weighted-sum. Various amounts of storage are dedicated to storing the higher-level redundancy information, such as amounts equivalent to an integer multiple of flash die (e.g. one, two, or three entire flash die), and such as amounts equivalent to a fraction of a single flash die (e.g. one-half or one-fourth of a single flash die).

Abstract: An information handling system may include at least one processor, a management controller, a serial peripheral interface (SPI) read-only memory (ROM), and at least one logic device. The management controller may be communicatively coupled to the at least one processor and configured to provide out-of-band management of the information handling system. The logic device may be configured to reset the SPI ROM in response to an indication that the SPI ROM is to be reset, and the resetting may include detaching the SPI ROM from a SPI controller, disconnecting a power source from the SPI ROM, in response to a passage of a particular amount of time, reconnecting the power source to the SPI ROM, and re-attaching the SPI ROM to the SPI controller.

Abstract: Proactively providing corrective measures for storage arrays includes: receiving data from a storage array, the data including one or more events; detecting, in dependence upon a problem signature, one or more events from the data indicative of a particular problem, where the problem signature comprises a specification of a pattern of events indicative of the particular problem experienced by at least one other storage array; determining whether the particular problem violates an operational policy of the storage array, the operational policy specifying at least one requirement for an operational metric of the storage array; and if the particular problem violates the operational policy of the storage array, deploying automatically without user intervention one or more corrective measures to prevent the storage array from experiencing the particular problem.

Abstract: Systems and methods are provided herein for automatically configuring newly installed secondary storage computing devices and managing secondary storage computing devices when one or more become unavailable. For example, a storage manager can then detect the computing resources available to the newly installed secondary storage computing device, assign a role to the newly installed secondary storage computing device based on the detected computing resources, configure the newly installed secondary storage computing device with deduplication and storage policies used by the other secondary storage computing devices, re-partition secondary storage devices to allocate memory for the newly installed secondary storage computing device, and instruct other secondary storage computing devices to replicate their managed data such that the newly installed secondary storage computing device has access to the replicated data.

Abstract: The disclosed embodiments provide a system that facilitates testing of an insecure computing environment. During operation, the system obtains a real data set comprising a set of data strings. Next, the system determines a set of frequency distributions associated with the set of data strings. The system then generates a test data set from the real data set, wherein the test data set comprises a set of random data strings that conforms to the set of frequency distributions. Finally, the system tests the insecure computing environment using the test data set.

Abstract: A microcontroller system which employs an intermediate approach in hybrid FRAM-SRAM that involves memory mapping of program sections to retain the reliability benefits provided by FRAM while performing almost as efficiently as an SRAM-based system. They system utilizes an energy-aware memory mapping method which maps different program sections to the hybrid FRAM-SRAM MCU such that energy consumption is minimized without sacrificing reliability. The method comprises a memory initialization map, which performs a one-time characterization to find the optimal memory map for the functions that constitute a program. The method further comprises an energy alignment, a hardware/software method that aligns the system's powered-on time intervals to function execution boundaries, which results in further improvements in energy efficiency and performance.

Abstract: Data, attributes, and metrics from unavailable resource hosts may be collected and used for cluster analysis in order to correlate the different hosts and group similar hosts into clusters. The clusters may be ranked based on the collected information and used to provide a simple way to identify shared failure modes among the unavailable hosts. By identifying the hosts of each cluster, shared failures can be corrected for large groups of hosts at the same time, enabling the hosts to return to operational states.

Abstract: Memory corruption detection technologies are described. A processor core of a processor can receive a first pointer produced by a first memory access instruction of an application being executed by the processor. The first pointer includes a first memory address of a first memory object and a third metadata value and the memory address identifies a memory block in the first set of one or more contiguous memory blocks. The processor core compares the third metadata value to the first metadata value and communicates a memory corruption detection message to the application when the third metadata value does not match the first metadata value. The processor core provides the first memory object to the application when the third metadata value matches the first metadata value.