Abstract: A write-through cache scheme is created. A store data command is sent to a cache line of a cache array from a processing unit. It is then determined whether the address of the store data is valid, wherein the original data from the store's address has been previously loaded into the cache. A write-through command is sent to a system bus as a function of whether the address of the store data is valid. The bus controller is employed to sense the write-through command. If the write-through command is sensed, a clean command is generated by the bus controller. If the write-through command is sensed, the store data is written into the cache array, and the data is marked as modified. If the write-through command is sensed, the clean command is sent onto the system bus by the bus controller, thereby causing modified data to be written to memory.

Abstract: A storage system has a cache memory, a side-file being a storage area prepared in memory, and a copy source storage device. Each time write data is received, the storage system writes the write data to the copy source storage device via the cache memory, and also writes the received write data to the side-file. The storage system sends the plurality of write data accumulated in the side-file to another storage system at a certain timing. Thus, the plurality of write data stored in the copy source storage device is written to the copy destination storage device in the other storage system.