Patents Examined by Yu Chen
  • Patent number: 11417059
    Abstract: Disclosed herein are systems and methods for reading input data into a geometry shader by rebuilding an index buffer. In one aspect, an exemplary method comprises constructing T-vectors for one-element ranges of the index buffer by defining each T-vector as a 4-component vector, calculating T-vectors for ranges [0; i] for all vertices of the index buffer by prefix scanning, for each vertex and for each primitive featuring the vertex, determining if the primitive is complete, and for each complete primitive, calculating an offset in an output index buffer using a component of the T-vector used to indicate, for the vertex, a number of complete primitives inside the range and a component that indicates a number of vertices since a last primitive restart, and writing an index value in an output index buffer, and reading input data into the geometry shader in accordance with the written index values.
    Type: Grant
    Filed: January 14, 2021
    Date of Patent: August 16, 2022
    Assignee: Parallels International GmbH
    Inventors: Alexey Ivanov, Evgeny Nikitenko, Nikolay Dobrovolskiy
  • Patent number: 11417296
    Abstract: [Problem] An information processing device, an information processing method, and a recording medium that enable change in display of real space without being noticed by a communicatee are to be proposed. [Solution] An information processing device, including: a determining unit that determines a gazing state or a non-gazing state of a first user present in first real space, for a display object displayed by a display device of the first user, the display object being associated with second real space different from the first real space; and a display control unit that changes appearance of the display object when the gazing state has been changed to the non-gazing state.
    Type: Grant
    Filed: December 28, 2018
    Date of Patent: August 16, 2022
    Assignee: SONY CORPORATION
    Inventors: Mari Saito, Tsuyoshi Ishikawa, Ryo Yokoyama
  • Patent number: 11416740
    Abstract: Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for an artificial intelligence system. In one aspect, a system includes multiple artificial intelligence skill agents that have each been trained to perform different actions in a telecommunications system. The system also includes an orchestrator agent that interacts with each of the artificial intelligence skill agents and coordinates which of the artificial intelligence agents performs actions in response to user inputs. The orchestrator agent receives a user input and determines an intent expressed by the user input. The orchestrator agent transmits an instruction to an artificial intelligence skill agent to perform an action that provides a response to the intent. In response to receiving the instruction from the orchestrator agent, the artificial intelligence skill agent performs the action when the artificial intelligence skill agent is capable of carrying out the action.
    Type: Grant
    Filed: April 13, 2018
    Date of Patent: August 16, 2022
    Assignee: ADTRAN, Inc.
    Inventors: Armand Nokbak Nyembe, Sheila Knight, Michael Arnold, Ramya Raghavendra, Jeremy Lyon, Venkata Mallikarjunarao Kosuri, Zack Whaley
  • Patent number: 11410401
    Abstract: The subject technology receives a selection of a selectable graphical item from a plurality of selectable graphical items, the selectable graphical item comprising an augmented reality content generator for applying a 3D effect, the 3D effect including at least one beautification operation. The subject technology captures image data and depth data using a camera. The subject technology applies, to the image data and the depth data, the 3D effect including the at least one beautification operation based at least in part on the augmented reality content generator, the beautification operation being performed as part of applying the 3D effect. The subject technology generates a 3D message based at least in part on the applied 3D effect including the at least one beautification operation. The subject technology renders a view of the 3D message based at least in part on the applied 3D effect including the at least one beautification operation.
    Type: Grant
    Filed: August 28, 2020
    Date of Patent: August 9, 2022
    Assignee: Snap Inc.
    Inventors: Kyle Goodrich, Samuel Edward Hare, Maxim Maximov Lazarov, Tony Mathew, Andrew James McPhee, Daniel Moreno, Dhritiman Sagar, Wentao Shang
  • Patent number: 11410946
    Abstract: A semiconductor apparatus including a bonding region in which a wire is bonded, includes: a semiconductor substrate; an oxide film provided on a principal surface of the semiconductor substrate in the bonding region; a polysilicon layer provided on the oxide film; an interlayer film partially provided on the polysilicon layer; a barrier metal directly provided on the polysilicon layer and the interlayer film; and an electrode provided on the barrier metal.
    Type: Grant
    Filed: October 14, 2020
    Date of Patent: August 9, 2022
    Assignee: Mitsubishi Electric Corporation
    Inventors: Daisuke Hirata, Akihisa Yamamoto
  • Patent number: 11411143
    Abstract: A light emitting device includes a substrate including a light emitting region. A first electrode is in the light emitting region. A second electrode is in the light emitting region and spaced apart from the first electrode. A light emitting element is between the first electrode and the second electrode. A first contact electrode connects an end of the light emitting element to the first electrode. A second contact electrode connects another end of the light emitting element to the second electrode. The first contact electrode and the second contact electrode have a thickness larger than or equal to that of the first electrode and the second electrode.
    Type: Grant
    Filed: July 5, 2019
    Date of Patent: August 9, 2022
    Assignee: Samsung Display Co., Ltd.
    Inventor: Seung Hoon Lee
  • Patent number: 11405663
    Abstract: Techniques for rendering a scene are disclosed. In some embodiments, a local database is populated with received three-dimensional object definitions. A received specification of a scene comprising a specification of objects comprising the scene is rendered according to the received specification using one or more three-dimensional object definitions already available in the local database.
    Type: Grant
    Filed: September 9, 2019
    Date of Patent: August 2, 2022
    Assignee: Outward, Inc.
    Inventor: Clarence Chui
  • Patent number: 11404270
    Abstract: A microelectronic device is formed by forming at least a portion of a substrate of the microelectronic device by one or more additive processes. The additive processes may be used to form semiconductor material of the substrate. The additive processes may also be used to form dielectric material structures or electrically conductive structures, such as metal structures, of the substrate. The additive processes are used to form structures of the substrate which would be costly or impractical to form using planar processes. In one aspect, the substrate may include multiple doped semiconductor elements, such as wells or buried layers, having different average doping densities, or depths below a component surface of the substrate. In another aspect, the substrate may include dielectric isolation structures with semiconductor material extending at least partway over and under the dielectric isolation structures. Other structures of the substrate are disclosed.
    Type: Grant
    Filed: November 30, 2018
    Date of Patent: August 2, 2022
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Benjamin Stassen Cook, Daniel Lee Revier
  • Patent number: 11403815
    Abstract: Map projections necessarily distort the Earth's surface in some fashion as a result of the transformation to a coordinate system. However, different map projection systems can preserve some properties of geospatial data (e.g., area) at the expense of other properties (e.g., distance or azimuth). To produce a minimally distorted global raster, a global raster generator creates a number and variety of projections using as input geospatial data. The generator intelligently selects the projection systems based on properties of the input data and desired properties of an output global raster. The generator then applies interpolation algorithms to the projections to produce smooth and continuous projections. The generator then re-projects the interpolated projections to a desired output projection system and filters the projections to identify and remove regions of the projections which exhibit distortion. The generator merges the filtered projections which results in a minimally distorted global raster.
    Type: Grant
    Filed: December 28, 2017
    Date of Patent: August 2, 2022
    Assignee: Landmark Graphics Corporation
    Inventors: Fabian Kohlmann, Graham Baines
  • Patent number: 11397889
    Abstract: The technology disclosed relates to constructing a convolutional neural network-based classifier for variant classification. In particular, it relates to training a convolutional neural network-based classifier on training data using a backpropagation-based gradient update technique that progressively match outputs of the convolutional network network-based classifier with corresponding ground truth labels. The convolutional neural network-based classifier comprises groups of residual blocks, each group of residual blocks is parameterized by a number of convolution filters in the residual blocks, a convolution window size of the residual blocks, and an atrous convolution rate of the residual blocks, the size of convolution window varies between groups of residual blocks, the atrous convolution rate varies between groups of residual blocks. The training data includes benign training examples and pathogenic training examples of translated sequence pairs generated from benign variants and pathogenic variants.
    Type: Grant
    Filed: October 15, 2018
    Date of Patent: July 26, 2022
    Assignee: Illumina, Inc.
    Inventors: Kishore Jaganathan, Kai-How Farh, Sofia Kyriazopoulou Panagiotopoulou, Jeremy Francis McRae
  • Patent number: 11398514
    Abstract: The present technology relates to a solid-state image pickup device that suppresses dark current while increasing the saturated charge amount, a manufacturing method therefor, and an electronic apparatus. The device includes a first photoelectric converter on a front surface side opposite to a light incident surface side of a substrate; a second photoelectric converter stacked on the first photoelectric converter; and a pixel isolation section, the pixel isolation section passing through the substrate. The first photoelectric converter includes a first plane-direction PN junction region joined in a plane direction parallel to a light incident surface of the substrate and a first perpendicular-direction PN junction region along a side wall of the pixel isolation section. The second photoelectric converter includes a second plane-direction PN junction region and a second perpendicular-direction PN junction region.
    Type: Grant
    Filed: March 6, 2019
    Date of Patent: July 26, 2022
    Assignee: Sony Semiconductor Solutions Corporation
    Inventor: Shin Iwabuchi
  • Patent number: 11380670
    Abstract: Provided is a method of manufacturing a ultra-small light-emitting diode (LED) electrode assembly, the method including preparing a base substrate, forming an electrode line including a first electrode and a second electrode on the base substrate, positioning a guide member having a plurality of slit portions therein on the base substrate, and inserting ultra-small LED devices into the plurality of slit portions of the guide member.
    Type: Grant
    Filed: September 21, 2020
    Date of Patent: July 5, 2022
    Assignee: Samsung Display Co., Ltd.
    Inventors: Young Rag Do, Yeon Goog Sung
  • Patent number: 11380713
    Abstract: An array substrate, a manufacturing method thereof and a display panel are provided, the array substrate includes a base substrate and a first conductive layer, a first insulating layer, a second conductive layer and a third conductive layer which are sequentially stacked on the base substrate, the first insulating layer insulates the first conductive layer from the second conductive layer, the first conductive layer includes a first signal line, the second conductive layer includes a second signal line and a first connection part spaced apart from each other, the third conductive layer includes a second connection part, the first connection part is electrically connected with the first signal line through a first via hole in the first insulating layer; the second connection part is electrically connected with the first connection part and the second signal line to constitute a connection structure electrically connecting the first signal line with the second signal line.
    Type: Grant
    Filed: April 26, 2019
    Date of Patent: July 5, 2022
    Assignees: HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Xingfeng Ren, Mingjing Li, Mingjian Yu
  • Patent number: 11373872
    Abstract: The present disclosure provides a method of manufacturing a semiconductor device includes forming a first gate insulating film on a substrate for a first device, forming a first gate electrode on the first gate insulating film; forming a mask pattern on the first gate electrode to expose opposing end portions of the first gate electrode, wherein a length of the mask pattern is smaller than a length of the first gate electrode; performing ion implantation through the exposed opposing end portions of the first gate electrode using the mask pattern to simultaneously form first and second drift regions in the substrate; forming spacers on sidewalls of the first gate electrode, respectively; and forming a first source region and a first drain region in the first and second drift regions, respectively.
    Type: Grant
    Filed: June 4, 2020
    Date of Patent: June 28, 2022
    Assignee: KEY FOUNDRY CO., LTD.
    Inventors: Hee Hwan Ji, Ji Man Kim, Song Hwa Hong, Bo Seok Oh
  • Patent number: 11374111
    Abstract: A semiconductor device that a fin structure, and a gate structure present on a channel region of the fin structure. A composite spacer is present on a sidewall of the gate structure including an upper portion having a first dielectric constant, a lower portion having a second dielectric constant that is less than the first dielectric constant, and an etch barrier layer between sidewalls of the first and second portion of the composite spacer and the gate structure. The etch barrier layer may include an alloy including at least one of silicon, boron and carbon.
    Type: Grant
    Filed: January 15, 2020
    Date of Patent: June 28, 2022
    Assignees: INTERNATIONAL BUSINESS MACHINES CORPORATION, GLOBALFOUNDRIES INC., STMICROELECTRONICS, INC.
    Inventors: Xiuyu Cai, Chun-Chen Yeh, Qing Liu, Ruilong Xie
  • Patent number: 11367232
    Abstract: The disclosure relates to a method and a device for generating a sticker. The method and device can receive a sticker configuration file from a server, where the sticker configuration file includes configuration parameters, and the configuration parameters represent display styles of a background image element and at least one text element in a target sticker to be generated; acquire a sticker background image and sticker characters input by a user as the background image element and the at least one text element respectively; and generate the target sticker according to the background image element, at least one the text element and the configuration parameters.
    Type: Grant
    Filed: October 23, 2020
    Date of Patent: June 21, 2022
    Assignee: Beijing Dajia Internet Information Technology Co., Ltd.
    Inventor: Chi Zheng
  • Patent number: 11362134
    Abstract: A light emitting device includes a vertical stack of a light emitting diode and a field effect transistor that controls the light emitting diode. An isolation layer is present between the light emitting diode and the field effect transistor, and an electrically conductive path electrically shorts a node of the light emitting diode to a node of the field effect transistor. The field effect transistor may include an indium gallium zinc oxide (IGZO) channel and may be located over the isolation layer. Alternatively, the field effect transistor may be a high-electron-mobility transistor (HEMT) including an epitaxial semiconductor channel layer and the light emitting diode may be located over the HEMT.
    Type: Grant
    Filed: August 13, 2020
    Date of Patent: June 14, 2022
    Assignee: NANOSYS, INC.
    Inventor: Zhen Chen
  • Patent number: 11354790
    Abstract: An image processing apparatus (100) includes: a variable determination unit (134) that performs, based on a distribution of luminance values of individual pixels included in a predetermined area determined according to information regarding a motion of a user out of first video data recorded in a first dynamic range, determination of a variable to be used to calculate the luminance values of the individual pixels when the first dynamic range is converted into a second dynamic range; and a converter (135) that converts the first video data into second video data displayed in the second dynamic range, based on the variable determined by the variable determination unit.
    Type: Grant
    Filed: January 15, 2019
    Date of Patent: June 7, 2022
    Assignee: SONY CORPORATION
    Inventor: Tooru Masuda
  • Patent number: 11348297
    Abstract: Methods, devices, media, and other embodiments are described for a state-space system for pseudorandom animation. In one embodiment animation elements within a computer model are identified, and for each animation element motion patterns and speed harmonics are identified. A set of motion data values comprising a state-space description of the motion patterns and the speed harmonics are generated, and a probability assigned to each value of the set of motion data values for the state-space description. The probability can then be used to select and update a particular motion used in an animation generated from the computer model.
    Type: Grant
    Filed: September 30, 2019
    Date of Patent: May 31, 2022
    Assignee: Snap Inc.
    Inventors: Gurunandan Krishnan Gorumkonda, Shree K. Nayar
  • Patent number: 11349001
    Abstract: A method of fabricating a static random-access memory (SRAM) device includes forming a sacrificial material and replacing the sacrificial material with a metal to form a cross-couple contact on a metal gate stack. A portion of the metal gate stack directly contacts each of a sidewall and an endwall of the cross-couple contact.
    Type: Grant
    Filed: October 10, 2019
    Date of Patent: May 31, 2022
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Ruilong Xie, Carl Radens, Kangguo Cheng, Veeraraghavan Basker, Juntao Li