Abstract: A circuit and method for supplying a block of instruction code to an instruction buffer for an instruction decoder. A block of instruction code is fetched and input through a buffer input. A first instruction buffer and a second instruction buffer are coupled to the buffer input to store the block of instruction code. The output of the instruction buffers and a bypass bus coupled to the buffer input are input into an instruction buffer multiplexer. The instruction buffer multiplexer selects among the three inputs and outputs two blocks of instruction code to a rotator. The rotator receives an input pointer indicative of an initial byte. The rotator outputs a block of instruction code beginning at the initial byte to an instruction decoder.
Type:
Grant
Filed:
February 24, 1997
Date of Patent:
December 1, 1998
Assignee:
Intel Corporation
Inventors:
Ashwani Kumar Gupta, Glenn J. Hinton, Chan W. Lee