Patents by Inventor A-Chien Yeh

A-Chien Yeh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250135173
    Abstract: A microneedle is provided in some embodiments of the present disclosure, including a supporting portion, a needle tip portion and an adhesion layer. The needle tip portion is disposed above the supporting portion, including an active substance. The adhesion layer is disposed between the supporting portion and the needle tip portion, including an adhesive material and a viscosity-reducing substance distributed in the adhesive material. A microneedle patch and a method are further provided in some embodiments of the present disclosure.
    Type: Application
    Filed: July 30, 2024
    Publication date: May 1, 2025
    Inventors: Mei-Chin CHEN, Ming-Thau SHEU, Chih-Chi CHANG, Chien-Chien YEH
  • Patent number: 11444215
    Abstract: A device and method for fabricating a photovoltaic device includes forming a double layer transparent conductive oxide on a transparent substrate. The double layer transparent conductive oxide includes forming a doped electrode layer on the substrate, and forming a buffer layer on the doped electrode layer. The buffer layer includes an undoped or p-type doped intrinsic form of a same material as the doped electrode layer. A light-absorbing semiconductor structure includes a p-type semiconductor layer on the buffer layer, an intrinsic layer and an n-type semiconductor layer.
    Type: Grant
    Filed: January 13, 2020
    Date of Patent: September 13, 2022
    Assignees: INTERNATIONAL BUSINESS MACHINES CORPORATION, BAY ZU PRECISION CO., LTD.
    Inventors: Shun-Ming Chen, Chien-Chih Huang, Joel P. Desouza, Augustin J. Hong, Jeehwan Kim, Chien-Yeh Ku, Devendra K. Sadana, Chuan-Wen Wang
  • Patent number: 11245295
    Abstract: A rotor is provided. The rotor includes a main body, a plurality of magnets and a plurality of magnet-receiving slots. The plurality of magnet-receiving slots are disposed on the main body and disposed around a central axis. Each two adjacent magnet-receiving slots are symmetrical to each other. Each magnet-receiving slot includes a slot body and a first flux barrier connected with each other. Each magnet is contained in the corresponding slot body. Each first flux barriers includes a respective arc-cutting start point. A minimum arc-cutting distance is formed between the two respective arc-cutting start points. Each of the two respective arc-cutting start points is extended toward the central axis along an arc with a first arc length radius to define a first arc-cutting end point. The first arc length radius is greater than or equal to 0.2 times of the minimum arc-cutting distance.
    Type: Grant
    Filed: August 3, 2020
    Date of Patent: February 8, 2022
    Assignee: DELTA ELECTRONICS, INC.
    Inventors: Yu-Hsiang Liu, Ta-Chien Yeh, Hsiang-Yun Hsiao, Chia-Hsiang Yang
  • Publication number: 20210296949
    Abstract: A rotor is provided. The rotor includes a main body, a plurality of magnets and a plurality of magnet-receiving slots. The plurality of magnet-receiving slots are disposed on the main body and disposed around a central axis. Each two adjacent magnet-receiving slots are symmetrical to each other. Each magnet-receiving slot includes a slot body and a first flux barrier connected with each other. Each magnet is contained in the corresponding slot body. Each first flux barriers includes a respective arc-cutting start point. A minimum arc-cutting distance is formed between the two respective arc-cutting start points. Each of the two respective arc-cutting start points is extended toward the central axis along an arc with a first arc length radius to define a first arc-cutting end point. The first arc length radius is greater than or equal to 0.2 times of the minimum arc-cutting distance.
    Type: Application
    Filed: August 3, 2020
    Publication date: September 23, 2021
    Inventors: Yu-Hsiang Liu, Ta-Chien Yeh, Hsiang-Yun Hsiao, Chia-Hsiang Yang
  • Publication number: 20210137278
    Abstract: The utility model relates to a crimping structure of a surface coating fabric of an article, which is mainly applied to a soft package of soft furniture and wall decoration. The crimping structure includes a coating fabric and a coated object, wherein the coating fabric includes a fabric body and a free end, the free end is folded upwardly and then fixed with the fabric body to form a strip-shaped accommodating hole, the accommodating hole is internally provided with a fixing rod in a penetrating manner, an accommodating groove is provided in the bottom of the coated object, and the fixing rod is engaged within the accommodating groove. A product coated by the crimping structure of the utility model is attractive, natural and full in effect, and difficult to crimp.
    Type: Application
    Filed: November 12, 2019
    Publication date: May 13, 2021
    Inventor: Chien-yeh CHEN
  • Patent number: 10897816
    Abstract: A rigid-flex circuit board includes a core substrate, a first adhesive layer, and a first outer conductive circuit layer. The core substrate includes a first and a second base layer, a first and a second conductive circuit layer respectively on the first and second base layer, and an insulating layer between the first and second base layer. The first and second conductive circuit layer are embedded in the insulating layer. The first adhesive layer is on the first base layer and defines a first opening which exposes the first opening. The first outer conductive circuit layer is on the first adhesive layer and defines an opening aligned with the first opening. A portion of the core substrate located within the first opening is defined as a flexible board section, and the portions of the core substrate located outside of the first opening are defined as a hard board section.
    Type: Grant
    Filed: June 25, 2019
    Date of Patent: January 19, 2021
    Assignees: QING DING PRECISION ELECTRONICS (HUAIAN) CO., LTD, Avary Holding (Shenzhen) Co., Limited.
    Inventors: Tzu-Chien Yeh, Lin-Jie Gao
  • Publication number: 20200152809
    Abstract: A device and method for fabricating a photovoltaic device includes forming a double layer transparent conductive oxide on a transparent substrate. The double layer transparent conductive oxide includes forming a doped electrode layer on the substrate, and forming a buffer layer on the doped electrode layer. The buffer layer includes an undoped or p-type doped intrinsic form of a same material as the doped electrode layer. A light-absorbing semiconductor structure includes a p-type semiconductor layer on the buffer layer, an intrinsic layer and an n-type semiconductor layer.
    Type: Application
    Filed: January 13, 2020
    Publication date: May 14, 2020
    Inventors: SHUN-MING CHEN, CHIEN-CHIH HUANG, JOEL P. DESOUZA, AUGUSTIN J. HONG, JEEHWAN KIM, CHIEN-YEH KU, DEVENDRA K. SADANA, CHUAN-WEN WANG
  • Patent number: 10593815
    Abstract: A device and method for fabricating a photovoltaic device includes forming a double layer transparent conductive oxide on a transparent substrate. The double layer transparent conductive oxide includes forming a doped electrode layer on the substrate, and forming a buffer layer on the doped electrode layer. The buffer layer includes an undoped or p-type doped intrinsic form of a same material as the doped electrode layer. A light-absorbing semiconductor structure includes a p-type semiconductor layer on the buffer layer, an intrinsic layer and an n-type semiconductor layer.
    Type: Grant
    Filed: February 12, 2018
    Date of Patent: March 17, 2020
    Assignees: INTERNATIONAL BUSINESS MACHINES CORPORATION, BAY ZU PRECISION CO., LTD
    Inventors: Shun-Ming Chen, Chien-Chih Huang, Joel P. Desouza, Augustin J. Hong, Jeehwan Kim, Chien-Yeh Ku, Devendra K. Sadana, Chuan-Wen Wang
  • Publication number: 20200077513
    Abstract: A rigid-flex circuit board includes a core substrate, a first adhesive layer, and a first outer conductive circuit layer. The core substrate includes a first and a second base layer, a first and a second conductive circuit layer respectively on the first and second base layer, and an insulating layer between the first and second base layer. The first and second conductive circuit layer are embedded in the insulating layer. The first adhesive layer is on the first base layer and defines a first opening which exposes the first opening. The first outer conductive circuit layer is on the first adhesive layer and defines an opening aligned with the first opening. A portion of the core substrate located within the first opening is defined as a flexible board section, and the portions of the core substrate located outside of the first opening are defined as a hard board section.
    Type: Application
    Filed: June 25, 2019
    Publication date: March 5, 2020
    Inventors: TZU-CHIEN YEH, LIN-JIE GAO
  • Publication number: 20190353151
    Abstract: An electric air pump includes a casing including an interior space; a pumping mechanism disposed in the space and including a driving device, a reciprocating piston driven by the driving device for compressing air, and an outlet being in fluid communication with the reciprocating piston; an on/off switch is disposed on the casing and including a switch contact configured to electrically connect to the driving device or not; and a USB receptacle disposed on the casing and electrically connected to the switch contact.
    Type: Application
    Filed: December 13, 2018
    Publication date: November 21, 2019
    Applicant: METALLICA INTERNATIONAL CO., LTD
    Inventor: Chien-Yeh Chang
  • Publication number: 20190350091
    Abstract: A FPCB includes a base layer defining at least one first through hole. A conductive paste block is formed in each first through hole. Each conductive paste block includes a first and a second end portion. The base layer has opposite surfaces, and a first conductive wiring layer is formed on each surface of the base layer. The first end portion at least protrudes from the base layer and is exposed from the first conductive wiring layer. An insulating layer and a second conductive wiring layer are formed on each first conductive wiring layer. At least one second through hole is defined in each insulating layer. The second through hole positioned near the first end portion extends to the first end portion and forms a recess. A conductive via is formed in each second through hole and the corresponding recess, and is electrically connected to the conductive paste block.
    Type: Application
    Filed: July 26, 2019
    Publication date: November 14, 2019
    Inventor: TZU-CHIEN YEH
  • Patent number: 10412827
    Abstract: A rigid-flex circuit board includes a core substrate, a first outer conductive circuit layer, and a second outer conductive circuit layer. The core substrate includes a first base layer and a second base layer. A first conductive circuit layer is formed on a surface of the first base layer, and a second conductive circuit layer is formed on a surface of the second base layer. An insulating layer is located between the first base layer and the second base layer. The first conductive circuit layer and the second conductive circuit layer are embedded within the insulating layer. A portion of the core substrate located within the first opening and the second opening is defined as a flexible board section, and the portions of the core substrate located outside of the first opening and the second opening are defined as a hard board section.
    Type: Grant
    Filed: September 29, 2018
    Date of Patent: September 10, 2019
    Assignees: QING DING PRECISION ELECTRONICS (HUAIAN) CO., LTD, Avary Holding (Shenzhen) Co., Limited.
    Inventors: Tzu-Chien Yeh, Lin-Jie Gao
  • Patent number: 10412841
    Abstract: A FPCB includes a base layer defining at least one first through hole. A conductive paste block is formed in each first through hole. Each conductive paste block includes a first and a second end portion. The base layer has opposite surfaces, and a first conductive wiring layer is formed on each surface of the base layer. The first end portion at least protrudes from the base layer and is exposed from the first conductive wiring layer. An insulating layer and a second conductive wiring layer are formed on each first conductive wiring layer. At least one second through hole is defined in each insulating layer. The second through hole positioned near the first end portion extends to the first end portion and forms a recess. A conductive via is formed in each second through hole and the corresponding recess, and is electrically connected to the conductive paste block.
    Type: Grant
    Filed: December 6, 2017
    Date of Patent: September 10, 2019
    Assignees: Avary Holding (Shenzhen) CO., Limited., HongQiSheng Precision Electronics (QinHuangDao) Co., Ltd.
    Inventor: Tzu-Chien Yeh
  • Publication number: 20190116677
    Abstract: A FPCB includes a base layer defining at least one first through hole. A conductive paste block is formed in each first through hole. Each conductive paste block includes a first and a second end portion. The base layer has opposite surfaces, and a first conductive wiring layer is formed on each surface of the base layer. The first end portion at least protrudes from the base layer and is exposed from the first conductive wiring layer. An insulating layer and a second conductive wiring layer are formed on each first conductive wiring layer. At least one second through hole is defined in each insulating layer. The second through hole positioned near the first end portion extends to the first end portion and forms a recess. A conductive via is formed in each second through hole and the corresponding recess, and is electrically connected to the conductive paste block.
    Type: Application
    Filed: December 6, 2017
    Publication date: April 18, 2019
    Inventor: TZU-CHIEN YEH
  • Patent number: 10157855
    Abstract: The present disclosure relates to a semiconductor device package and a manufacturing method thereof. The semiconductor device package includes a carrier, at least one electronic component, a first magnetic layer and a second magnetic layer. The carrier has a top surface on which the electronic component is disposed. The first magnetic layer is disposed on the top surface of the carrier and encapsulates the electronic component. The second magnetic layer is disposed on the first magnetic layer and covers a top surface and a lateral surface of the first magnetic layer. A permeability of the first magnetic layer is less than a permeability of the second magnetic layer.
    Type: Grant
    Filed: June 3, 2015
    Date of Patent: December 18, 2018
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Wei-Hsuan Lee, Chien-Yeh Liu, Sung-Mao Li, Jaw-Ming Ding
  • Publication number: 20180175225
    Abstract: A device and method for fabricating a photovoltaic device includes forming a double layer transparent conductive oxide on a transparent substrate. The double layer transparent conductive oxide includes forming a doped electrode layer on the substrate, and forming a buffer layer on the doped electrode layer. The buffer layer includes an undoped or p-type doped intrinsic form of a same material as the doped electrode layer. A light-absorbing semiconductor structure includes a p-type semiconductor layer on the buffer layer, an intrinsic layer and an n-type semiconductor layer.
    Type: Application
    Filed: February 12, 2018
    Publication date: June 21, 2018
    Inventors: SHUN-MING CHEN, CHIEN-CHIH HUANG, JOEL P. DESOUZA, AUGUSTIN J. HONG, JEEHWAN KIM, CHIEN-YEH KU, DEVENDRA K. SADANA, CHUAN-WEN WANG
  • Patent number: 9917215
    Abstract: A device and method for fabricating a photovoltaic device includes forming a double layer transparent conductive oxide on a transparent substrate. The double layer transparent conductive oxide includes forming a doped electrode layer on the substrate, and forming a buffer layer on the doped electrode layer. The buffer layer includes an undoped or p-type doped intrinsic form of a same material as the doped electrode layer. A light-absorbing semiconductor structure includes a p-type semiconductor layer on the buffer layer, an intrinsic layer and an n-type semiconductor layer.
    Type: Grant
    Filed: June 22, 2016
    Date of Patent: March 13, 2018
    Assignees: INTERNATIONAL BUSINESS MACHINES CORPORATION, BAY ZU PRECISION CO., LTD.
    Inventors: Shun-Ming Chen, Chien-Chih Huang, Joel P. Desouza, Augustin J. Hong, Jeehwan Kim, Chien-Yeh Ku, Devendra K. Sadana, Chuan-Wen Wang
  • Patent number: 9872393
    Abstract: A circuit board includes a core layer, at least one passive component, a first and a second conductive wire layers, at least one contact pad, and a resin packing layer. The core layer defines at least one through hole to receive the passive component. The first and the second conductive wire layers are connected to two opposite surfaces of the core layer. Each contact pad is positioned between and connected to one passive component and the first conductive wire layer. The resin packing layer is filled among the core layer, each passive component, each contact pad, the first and the second conductive wire layers. The resin packing layer can connect the first and the second conductive wire layers to the core layer, and connect the core layer, each passive component, and each contact pads to each other.
    Type: Grant
    Filed: October 19, 2015
    Date of Patent: January 16, 2018
    Assignees: Avary Holding (Shenzhen) Co., Limited, HongQiSheng Precision Electronics (QinHuangDao) Co., Ltd., GARUDA TECHNOLOGY CO., LTD.
    Inventor: Tzu-Chien Yeh
  • Patent number: 9653415
    Abstract: The present disclosure relates to a semiconductor device package. The semiconductor device package includes a substrate, a semiconductor device, a plurality of electronic components, a first package body, a patterned conductive layer and a feeding element. The semiconductor device and the plurality of electronic components are disposed on the substrate. The first package body covers the semiconductor device but exposes the plurality of electronic components. The patterned conductive layer is formed on the first package body. The feeding element electrically connects the patterned conductive layer to the plurality of electronic components.
    Type: Grant
    Filed: February 18, 2015
    Date of Patent: May 16, 2017
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Wei-Hsuan Lee, Sung-Mao Li, Chien-Yeh Liu
  • Publication number: 20160366766
    Abstract: A circuit board includes a core layer, at least one passive component, a first and a second conductive wire layers, at least one contact pad, and a resin packing layer. The core layer defines at least one through hole to receive the passive component. The first and the second conductive wire layers are connected to two opposite surfaces of the core layer. Each contact pad is positioned between and connected to one passive component and the first conductive wire layer. The resin packing layer is filled among the core layer, each passive component, each contact pad, the first and the second conductive wire layers. The resin packing layer can connect the first and the second conductive wire layers to the core layer, and connect the core layer, each passive component, and each contact pads to each other.
    Type: Application
    Filed: October 19, 2015
    Publication date: December 15, 2016
    Inventor: TZU-CHIEN YEH