Abstract: Electrochemical impedance spectroscopy (EIS) may be used in conjunction with continuous glucose monitoring (CGM) to enable identification of valid and reliable sensor data, as well implementation of Smart Calibration algorithms.

Abstract: Soybean plants producing soybean seeds comprising leghemoglobin are produced by modifying the genome of the soybean plant. Soybean plants, soybean seeds and soy protein compositions comprising leghemoglobin are provided. Soybean plants, soybean seeds and soy protein compositions comprising leghemoglobin and additionally one or more of high oleic acid, low linolenic acid, high protein, low stachyose, low raffinose and low protease inhibitors are provided. Protein compositions comprising leghemoglobin, such as soy isolates and concentrates can be made from the soybean seeds. Additionally, methods for generating and using plants, seeds and protein compositions comprising leghemoglobin are disclosed.

Abstract: An information handling system includes multiple dual in-line memory modules (DIMMs) and a basic input/output system (BIOS). The DIMMs form a memory system of the information handling system. The BIOS begins a system boot of the information handling system, and performs a first memory reference code training. Based on the first memory reference code training, the BIOS discovers a bad DIMM of the DIMMs, and stores information associated with the bad DIMM. The BIOS reboots the information handling system. During the reboot, the BIOS retrieves the information associated with the bad DIMM. The BIOS disables a slot associated with the bad DIMM. In response to the slot being disabled, the BIOS performs a second memory reference code training. Based on the second memory reference code training, the BIOS downgrades the memory system to a closest possible DIMM population.

Abstract: The invention relates to inhibitors of ROCK1 and/or ROCK2 having the formula I: Also provided are methods of inhibiting ROCK1 and/or ROCK2 useful for the treatment of disease.

Abstract: Embodiments are disclosed for crash detection on one or more mobile devices (e.g., smartwatch and/or smartphone). In some embodiments, a method comprises: detecting, with at least one processor, a crash event on a crash device; extracting, with the at least one processor, multimodal features from sensor data generated by multiple sensing modalities of the crash device; computing, with the at least one processor, a plurality of crash decisions based on a plurality of machine learning models applied to the multimodal features; and determining, with the at least one processor, that a severe vehicle crash has occurred involving the crash device based on the plurality of crash decisions and a severity model.

Abstract: In one or more embodiments, one or more systems, one or more methods, and/or one or more processes may receive a first license associated with a first amount of physical storage to permit an operating system (OS) and/or a hypervisor to utilize; initialize a data structure with first information associated with the first amount of the physical storage; retrieve the first information associated with the first amount of the physical storage from the data structure; receive a second license associated with a second amount of the physical storage, greater than the first amount, to permit the OS and/or the hypervisor to utilize; update the data structure with second information associated with the second amount of the physical storage; receive a notification associated with the second amount of the physical storage; and retrieve the second information associated with the second amount of the physical storage from the data structure.

Abstract: An information handling system includes a BIOS and a service processor. The BIOS may generate, during a POST, a secret key that includes a symmetric key and a HMAC key and transmits the secret key to the service processor via an high-speed communication interface. After the POST, the BIOS transmits an SMI message that includes an encrypted message and a first hash value of the encrypted message. The encrypted message is encrypted using the symmetric key and the first hash value of the encrypted message is calculated using the HMAC key. The service processor calculate a second hash value of encrypted message based on the HMAC key and verify the encrypted message by comparing the first hash value and the second hash value. After a successful verification, the service processor decrypts the encrypted message and transmits a response to the BIOS.

Abstract: Methods and systems for managing the operation of data processing systems are disclosed. A data processing system may include a computing device that may enter various operating states by performing various types of startups. The startups may include use of code bases for which the computing device may not inherently be able to validate. To reduce risk of using the code bases, the computing device may perform processes to validate the code bases prior to using the code bases. Additionally, the computing devices may limit the types of interfaces that may be established during the startups while allowing other types of interfaces to be established to provide startup flexibility.

Abstract: Methods and systems for managing the operation of data processing systems are disclosed. A data processing system may include a computing device that may enter various operating states by performing various types of startups. The startups may include use of code bases for which the computing device may not inherently be able to validate. To reduce risk of using the code bases, the computing device may perform processes to validate the code bases prior to using the code bases. The processes may include obtaining security information for a portion of the code base from a trusted source, and using the security information to validate portions of the code base ahead of use of the portions to complete startups.

Abstract: An information handling system includes a memory, a basic input/output system (BIOS), and a baseboard memory controller (BMC). The memory stores a current BMC reliability, availability, and serviceability (RAS) driver. The BIOS receives a firmware update release. The firmware update release includes a first BMC RAS driver. The BIOS stores the first BMC RAS driver in a predetermined location of the memory. The BMC reads the first BMC RAS driver from the memory. The BMC also determines whether a first version of the first BMC RAS driver is different than a second version of a second BMC RAS version loaded in the BMC. In response to the first and second versions being different, the BMC loads the first BMC RAS driver.

Abstract: An information handling system includes multiple dual in-line memory modules (DIMMs) and a basic input/output system (BIOS). The DIMMs form a memory system of the information handling system. The BIOS begins a system boot of the information handling system, and performs a first memory reference code training. Based on the first memory reference code training, the BIOS discovers a bad DIMM of the DIMMs, and stores information associated with the bad DIMM. The BIOS reboots the information handling system. During the reboot, the BIOS retrieves the information associated with the bad DIMM. The BIOS disables a slot associated with the bad DIMM. In response to the slot being disabled, the BIOS performs a second memory reference code training. Based on the second memory reference code training, the BIOS downgrades the memory system to a closest possible DIMM population.

Abstract: An information handling system may detect whether each one of a plurality of peripheral component interconnect express (PCIe) slots is populated or unpopulated, and update a PCIe bus configuration map to indicate whether each of the PCIe slots is populated. The system may also allocate PCIe bus resources to each of the PCIe slots based on the PCIe bus configuration map, wherein the allocating of the PCIe bus resources includes prioritizing populated PCIe slots over unpopulated PCIe slots.

Abstract: In one or more embodiments, one or more systems, one or more methods, and/or one or more processes may retrieve a first hash value of a key manifest public key from a one time programmable memory medium; determine a second hash value of the key manifest public key; retrieve a third hash value of an initial boot block from the boot policy manifest; determine a fourth hash value of the initial boot block; determine that the third hash matches the fourth hash value; execute the initial boot block; validate subordinate certificates with a root certificate; determine firmware hash values respectively from the firmware volumes; decrypt signatures respectively associated with the firmware volumes to obtain respective decrypted signatures, in which the signatures are decrypted with public encryption keys of the respective subordinate certificates; determine that the firmware hash values respectively match the decrypted signatures; and execute the firmware volumes.

Abstract: The present disclosure relates to oligonucleotide aptamers that bind to certain small molecules including thiamine analogs and derivatives and methods of generating aptamers that bind to the small molecules. Also contemplated are riboswitches and polynucleotide cassettes comprising the aptamers disclosed herein. Further provided are methods of using said aptamers, riboswitches, and/or polynucleotide for the regulation of target genes, including therapeutic genes. Also provided herein are small molecules that are modulators of target gene expression where the target gene contains a riboswitch comprising an aptamer described herein.

Abstract: A first wafer has a first stop layer deposited on a substrate, the substrate used to form a base support structure. A second wafer has a second stop layer deposited on a sacrificial substrate, and a filter layer deposited on the second stop layer. A rib layer is deposited on one of: the first stop layer of the first layer; or a third stop layer that is deposited over the filter layer. A rib pattern is formed in the rib layer. The first and second wafers are flip bonded such that the rib pattern is joined between the filter layer and the first stop layer. Elongated voids are formed within the filter layer. The base support structure is formed within the substrate of the first wafer such that there is a fluid flow path between the base support structure, the rib layer, and the elongated voids of the filter layer.

Abstract: The invention relates to inhibitors of ROCK1 and/or ROCK2. Also provided are methods of inhibiting ROCK1 and/or ROCK2 that are useful for the treatment of disease.

Abstract: In one or more embodiments, one or more systems, one or more methods, and/or one or more processes may read configuration information that indicates utilization of a custom information handling system firmware IHSFW image by an information handling system (IHS); provide the custom IHSFW image and a signature of the custom IHSFW image to a processor of the IHS; decrypt the signature of the custom IHSFW image to obtain a hash value of the custom IHSFW image; determine a test hash value of the custom IHSFW image; determine if the hash value matches the test hash value; if the hash value matches the test hash value, boot a custom IHSFW from the custom IHSFW image; and if the hash value does not match the test hash value, boot another IHSFW from another IHSFW image stored by a non-volatile memory medium of the IHS.

Abstract: In one embodiment, a method for managing a smart network interface controller includes: sending a request for estimated resource requirements associated with the smart network interface controller to a baseboard management controller of the information handling system, the estimated resource requirements indicating estimated system resources likely to be required by emulated devices of the smart network interface controller; receiving the estimated resource requirements from the baseboard management controller; initializing the estimated system resources based on the estimated resource requirements; enumerating system resources for one or more additional devices of the information handling system; determining that the smart network interface controller is in a ready state; identifying actual resource requirements associated with the smart network interface controller indicating actual system resources required by the emulated devices of the smart network interface controller; and enumerating the actual system

Abstract: A secure boot policy may be stored in the information handling system and used to create a trusted relationship with a CPU, including a neutral CPU that has not been fused with an OEM key. The secure boot policy may be a data blob including platform-specific identification information (e.g., one or more of flash memory unique ID, motherboard ePPID), a boot policy (e.g., specifying to enable or disable neutral CPU fusing), and a signature. The secure boot policy may be stored in a one-time-programmable (OTP) storage of the information handling system, such as an OTP region in the serial peripheral interface (SPI) flash memory part storing the basic input/output system (BIOS). The BIOS may verify the secure boot policy using a public key and check if the boot policy is bound to current BIOS flash part and/or system configuration, and then apply the boot policy if the verification is passed.

Abstract: The invention relates to inhibitors of ROCK1 and/or ROCK2. Also provided are methods of inhibiting ROCK1 and/or ROCK2 that are useful for the treatment of disease.