Patents by Inventor A-Hua Chang

A-Hua Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240192576
    Abstract: A camera module suited for assembled in a casing is provided. The camera module includes a camera and a switch cover. The camera is disposed in the casing and aligned with a camera hole of the casing. The switch cover is slidably disposed in the casing, wherein the switch cover includes a sliding member and a shielding member secured to the sliding member, and a thickness of the shielding member is less than a thickness of the sliding member. The camera hole is seated on a sliding path of the shielding member. The shielding member is suited for blocking between the camera and the camera hole or moving out between the camera and the camera hole. An electronic device is also provided.
    Type: Application
    Filed: August 13, 2023
    Publication date: June 13, 2024
    Applicant: Acer Incorporated
    Inventors: Yu-Chin Huang, Cheng-Mao Chang, Li-Hua Hu, Pao-Min Huang, Chien-Yuan Chen
  • Publication number: 20240194492
    Abstract: The disclosure is a separation method of bonded substrates. The bonded substrate is placed on a breathable plate of a debonding device to separate a wafer and a carrier substrate of the bonded substrate, and the wafer is placed on the breathable plate. A robot arm moves the wafer and the breathable plate to a cleaning device for cleaning, and then moves the wafer and the breathable plate to a relay device. Clamping units of the relay device clamp the breathable plate, and a bernoulli arm sucks the wafer and separates the wafer and the breathable plate, and then the robot arm transports the wafer and the breathable plate to a storage device respectively. The disclosure can automatically debond and clean the bonded substrate, and automatically move the wafer from the breathable plate, which can avoid the fragmentation of wafer.
    Type: Application
    Filed: December 7, 2022
    Publication date: June 13, 2024
    Inventors: JUNG-HUA CHANG, JING-CHENG LIN, TA-HAO KUO
  • Publication number: 20240192597
    Abstract: A polymer is formed by a reaction of phenolic epoxy resin or bisphenol epoxy resin and carboxylic acid, wherein the phenolic epoxy resin has a chemical structure of wherein W is H, alkyl group, or halogen. R1 is methylene, methylene diphenyl, dimethylene benzene, tetrahydrodicyclopentadiene, or n=1 to 8. The bisphenol epoxy resin has a chemical structure of wherein Z is H or alkyl group; R4 is methylene, methylmethylene, dimethylmethylene, ethylmethylmethylene, bi(trifluoromethyl)methylene, fluorenylidene, or sulfonyl group; and p=1 to 10. The carboxylic acid has a chemical structure of HOOC—Ar—(—X)m, HOOC—R2, or a combination thereof, wherein Ar is benzene or naphthalene; X is hydroxy group, alkoxy group, or alkyl group, and at least one X is hydroxy group; m=1 to 3, wherein R2 is C3-7 alkyl group.
    Type: Application
    Filed: October 25, 2023
    Publication date: June 13, 2024
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Yu-Ying HSU, Yao-Jheng HUANG, Ming-Tzung WU, Chin-Hua CHANG, Te-Yi CHANG
  • Patent number: 12009575
    Abstract: A package structure including a first redistribution circuit structure, a semiconductor die, first antennas and second antennas is provided. The semiconductor die is located on and electrically connected to the first redistribution circuit structure. The first antennas and the second antennas are located over the first redistribution circuit structure and electrically connected to the semiconductor die through the first redistribution circuit structure. A first group of the first antennas are located at a first position, a first group of the second antennas are located at a second position, and the first position is different from the second position in a stacking direction of the first redistribution circuit structure and the semiconductor die.
    Type: Grant
    Filed: April 18, 2023
    Date of Patent: June 11, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Nan-Chin Chuang, Chen-Hua Yu, Chung-Shi Liu, Chao-Wen Shih, Shou-Zen Chang
  • Patent number: 12009177
    Abstract: A method includes applying a first voltage to a source of a first transistor of a detector unit of a semiconductor detector in a test wafer and applying a second voltage to a gate of the first transistor and a drain of a second transistor of the detector unit. The first transistor is coupled to the second transistor in series, and the first voltage is higher than the second voltage. A pre-exposure reading operation is performed to the detector unit. Light of an exposure apparatus is illuminated to a gate of the second transistor after applying the first and second voltages. A post-exposure reading operation is performed to the detector unit. Data of the pre-exposure reading operation is compared with the post-exposure reading operation. An intensity of the light is adjusted based on the compared data of the pre-exposure reading operation and the post-exposure reading operation.
    Type: Grant
    Filed: February 9, 2021
    Date of Patent: June 11, 2024
    Assignees: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., NATIONAL TSING HUA UNIVERSITY
    Inventors: Ya-Chin King, Chrong-Jung Lin, Burn-Jeng Lin, Chien-Ping Wang, Shao-Hua Wang, Chun-Lin Chang, Li-Jui Chen
  • Patent number: 12006571
    Abstract: An atomic layer deposition apparatus for coating on fine powders is disclosed, which includes a vacuum chamber, a shaft sealing device, and a driving unit. The shaft sealing device includes an outer tube and an inner tube arranged in an accommodating space of the outer tube. The driving unit drives the vacuum chamber to rotate through the outer tube to agitate the fine powders in a reaction space of the vacuum chamber. An air extraction line and an air intake line are arranged in a connection space of the inner tube. The air extraction line is used to extract gas from the reaction space. The air intake line is used to transport non-reactive gas to the reaction space to blow the fine powders around in the reaction space and precursor gas to the reaction space to form thin films with uniform thickness on the surface of the fine powders.
    Type: Grant
    Filed: March 11, 2021
    Date of Patent: June 11, 2024
    Assignee: SKY TECH INC.
    Inventors: Jing-Cheng Lin, Ching-Liang Yi, Jung-Hua Chang, Chia-Cheng Ku
  • Patent number: 12006589
    Abstract: A purification apparatus and a method of purifying hot zone parts are provided. The purification apparatus is configured to remove impurities attached on at least one hot zone part. The purification apparatus includes a crystal high temperature furnace, an enclosed box disposed in the crystal high temperature furnace, an outer tube connected to the crystal high temperature furnace and the enclosed box, an inner tube disposed in the outer tube, and a gas inlet cover connected to the outer tube. The crystal high temperature furnace includes a furnace body, a furnace cover, and a thermal field module disposed in the furnace body. The gas inlet cover is configured to input a noble gas into the enclosed box through the inner tube, and the thermal field module is configured to heat the noble gas so that the impurities are heated and vaporized through the noble gas.
    Type: Grant
    Filed: February 24, 2022
    Date of Patent: June 11, 2024
    Assignee: GLOBALWAFERS CO., LTD.
    Inventors: Chung-Sheng Chang, Masami Nakanishi, Yu-Sheng Su, Yen-Hsun Chu, Yung-Chi Wu, Yi-Hua Fan
  • Publication number: 20240186780
    Abstract: An electrical box includes a body, a cover, adjustable mounting brackets and a connection geometry for engagement with a connection geometry of a floor support structure. The adjustable mounting brackets are configured to be adjusted in the vertical direction to accommodate floor materials of different thicknesses so that a top surface of the electrical box is flush with a top surface of adjacent floor material(s). The electrical box houses electrical connection points such as electrical receptacles or data or audio/video connections that remain sheltered from the outdoor elements but are also easily accessible.
    Type: Application
    Filed: December 5, 2023
    Publication date: June 6, 2024
    Inventors: John R. Marrotte, Daniel Parker Murray, Shaun Eric Abbott, Michael Diamantoplos, JR., John Arthur Bellemare, Xinguo Chang, Hua Xiao
  • Publication number: 20240186308
    Abstract: A semiconductor device and a manufacturing method thereof are provided. The semiconductor device includes a redistribution layer (RDL) module, a first semiconductor module, an interconnection module, a second semiconductor module and a molding material. The first semiconductor module is disposed on the RDL module. The interconnection module is disposed on the RDL module. The second semiconductor module is disposed on the interconnection module. The molding material covers the RDL module and surrounds the first semiconductor module and the second semiconductor module. A top surface of the first semiconductor module and a top surface of the second semiconductor module are exposed by the molding material.
    Type: Application
    Filed: January 19, 2023
    Publication date: June 6, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kai-Fung CHANG, Chin-Wei LIANG, Sheng-Feng WENG, Ming-Yu YEN, CHEYU LIU, Hung-Chih CHEN, Yi-Yang LEI, CHING-HUA HSIEH, Hung-Chou LIAO
  • Publication number: 20240186724
    Abstract: An antenna module includes an antenna box and a first connection wire. The antenna box can include a first antenna, a second antenna, a first connection terminal, a second connection terminal and a housing. The first and second antennas are located in the housing and the housing has a first opening collectively exposing a portion of the first connection terminal and a portion of the second connection terminal. Each of the first and second antennas is adapted to receive or transmit wireless signals according to one of a plurality of wireless communication standards and the first and second antennas are electrically connected to the first and second connection terminals, respectively. The wireless communication standards can be different from each other.
    Type: Application
    Filed: November 6, 2023
    Publication date: June 6, 2024
    Inventors: Tsai-Yi Yang, Yung-Sheng Tseng, Bo-Yuan Chang, Sheng-Shen Chang, Yu-Hua Chen, Shih-Shih Chien, En-Chin Wei
  • Publication number: 20240180945
    Abstract: A compound of Formula (I): or a pharmaceutically acceptable salt thereof, in which Ring X is a 3 to 7 membered monocyclic ring, at least one of R1, R2, R3, and R4 is OR5 or CH2OR5 and the other R1, R2, R3, and R4 each independently are halogen, OH, OR5, CH2OR5, CO2H, OC?OR6, (C?O)R6, R6, C1-10 alkyl, C2-10 alkenyl, C2-10 alkynyl, H, or absent. Also provided herein are therapeutic uses of the compound of Formula (I).
    Type: Application
    Filed: October 24, 2023
    Publication date: June 6, 2024
    Applicant: SyneuRx International (Taiwan) Corp.
    Inventors: Guochuan Emil Tsai, Yi-Wen Mao, Lu-Ping Lu, Wei-Hua Chang, Han-Yi Hsieh, Jhe Wei Hu, Tsai-Miao Shih, ChanHui Huang
  • Publication number: 20240180492
    Abstract: A signal transmitting element is used to solve the problem that an additional surgery is required to remove the conventional vascular monitoring element after completing the detecting task. The signal transmitting element comprises a body made of a specific biodegradable material. The body includes a signal sensing portion including a structure configured to sense a blood flow information of a blood vessel surrounded and contacted by the body, thereby generating a blood vessel signal; and a signal transmitting portion coupled with the signal sensing portion for receiving the blood vessel signal and including a specific structure configured to convert the blood vessel signal into a transmission signal.
    Type: Application
    Filed: December 1, 2022
    Publication date: June 6, 2024
    Inventors: Chun-Chieh Tseng, Chun-Ming Chen, Tung-Lin Tsai, Yen-Hao Chang, Shu-Hung Huang, Sheng-Hua Wu, Yen-Hsin Kuo, Ping-Ruey Chou
  • Patent number: 12002681
    Abstract: A fabricating method of a high electron mobility transistor includes providing a substrate. Then, a channel layer, an active layer, a P-type group III-V compound material layer, a metal compound material layer, a hard mask material layer and a patterned photoresist are formed to cover the substrate. Later, a dry etching process is performed to etch the hard mask material layer and the metal compound material layer to form a hard mask and a metal compound layer by taking the patterned photoresist as a mask. During the dry etching process, a spacer generated by by-products is formed to surround the patterned photoresist, the hard mask and the metal compound layer. After the dry etching process, the P-type group III-V compound material layer is etched by taking the spacer and the patterned photoresist as a mask.
    Type: Grant
    Filed: October 31, 2021
    Date of Patent: June 4, 2024
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Ming-Hua Chang, Kun-Yuan Liao, Lung-En Kuo, Chih-Tung Yeh
  • Patent number: 12002883
    Abstract: A semiconductor device includes a semiconductor substrate, a gate structure, a first drift region, a first source/drain region, and a gate oxide layer. The gate structure and the gate oxide layer are disposed on the semiconductor substrate. The first drift region is disposed in the semiconductor substrate. The first source/drain region is disposed in the first drift region. At least a part of a first portion of the gate oxide layer is disposed between the gate structure and the semiconductor substrate in a vertical direction. A second portion of the gate oxide layer is disposed between the first portion and the first source/drain region in a horizontal direction. The second portion includes a bottom extending downwards and a first depressed top surface located above the bottom. A part of the first drift region is located under the first portion and the second portion of the gate oxide layer.
    Type: Grant
    Filed: January 18, 2022
    Date of Patent: June 4, 2024
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Tsung-Yu Yang, Shin-Hung Li, Ruei-Jhe Tsao, Che-Hua Chang
  • Publication number: 20240177893
    Abstract: An over-current protection device includes a heat-sensitive layer and an electrode layer. The electrode layer includes a top metal layer and a bottom metal layer, and the heat-sensitive layer attached therebetween. The heat-sensitive layer exhibits a positive temperature coefficient (PTC) characteristic and includes a polymer matrix and a conductive filler. The polymer matrix includes a polyolefin-based homopolymer and a polyolefin-based copolymer. The polyolefin-based homopolymer has a first coefficient of thermal expansion (CTE), and the polyolefin-based copolymer has a second CTE lower than the first CTE. The polyolefin-based homopolymer and the polyolefin-based copolymer together form an interpenetrating polymer network (IPN).
    Type: Application
    Filed: May 3, 2023
    Publication date: May 30, 2024
    Inventors: CHENG-YU TUNG, Chia-Yuan Lee, HSIU-CHE YEN, CHEN-NAN LIU, YUNG-HSIEN CHANG, Yao-Te Chang, FU-HUA CHU, Takashi Hasunuma
  • Publication number: 20240178177
    Abstract: A structure includes a redistribution structure, which includes a bottom layer and a plurality of upper layers over the bottom layer. The redistribution structure also includes a power-ground macro extending from a topmost layer in the plurality of upper layers to a bottommost layer in the plurality of upper layers, and a metal pad in the bottom layer and overlapped by the power-ground macro. The metal pad is electrically disconnected from the power-ground macro.
    Type: Application
    Filed: January 31, 2024
    Publication date: May 30, 2024
    Inventors: Ting-Yu Yeh, Chun-Hua Chang, Fong-Yuan Chang, Jyh Chwen Frank Lee
  • Patent number: 11996466
    Abstract: A method of forming a gas spacer in a semiconductor device and a semiconductor device including the same are disclosed. In accordance with an embodiment, a method includes forming a gate stack over a substrate; forming a first gate spacer on sidewalls of the gate stack; forming a second gate spacer on sidewalls of the first gate spacer; removing the second gate spacer using an etching process to form a first opening, the etching process being performed at a temperature less than 0° C., the etching process using an etching solution including hydrogen fluoride; and depositing a dielectric layer over the first gate spacer and the gate stack, the dielectric layer sealing a gas spacer in the first opening.
    Type: Grant
    Filed: May 9, 2022
    Date of Patent: May 28, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chen-Huang Huang, Ming-Jhe Sie, Cheng-Chung Chang, Shao-Hua Hsu, Shu-Uei Jang, An Chyi Wei, Shiang-Bau Wang, Ryan Chia-Jen Chen
  • Patent number: 11996400
    Abstract: A manufacturing method of a package-on-package structure includes at least the following steps. Top packages are mounted on a top side of a reconstructed wafer over a flexible tape, where conductive bumps at a bottom side of the reconstructed wafer is attached to the flexible tape, and during the mounting, a shape geometry of the respective conductive bump changes and at least a lower portion of the respective conductive bump is embraced by the flexible tape. The flexible tape is released from the conductive bumps after the mounting.
    Type: Grant
    Filed: April 27, 2022
    Date of Patent: May 28, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hsuan-Ting Kuo, Ching-Hua Hsieh, Cheng-Ting Chen, Hsiu-Jen Lin, Hao-Jan Pei, Yu-Peng Tsai, Chia-Lun Chang, Chih-Chiang Tsao, Philip Yu-Shuan Chung
  • Patent number: 11990546
    Abstract: A semiconductor device includes a semiconductor substrate, a gate structure, a source region, a drain region, a first oxide layer, a field plate, and a second oxide layer. The gate structure is disposed on the semiconductor substrate. The source region and the drain region are disposed in the semiconductor substrate and located at two opposite sides of the gate structure respectively. The first oxide layer includes a first portion disposed between the gate structure and the semiconductor substrate and a second portion disposed between the gate structure and the drain region. The field plate is partly disposed above the gate structure and partly disposed above the second portion of the first oxide layer. The second oxide layer includes a first portion disposed between the field plate and the gate structure and a second portion disposed between the field plate and the second portion of the first oxide layer.
    Type: Grant
    Filed: March 13, 2023
    Date of Patent: May 21, 2024
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Cheng-Hua Yang, Chih-Chien Chang, Shen-De Wang
  • Patent number: 11990258
    Abstract: An over-current protection device includes first and second electrode layers and a PTC material layer laminated therebetween. The PTC material layer includes a polymer matrix, a conductive filler, and a titanium-containing dielectric filler. The polymer matrix has a fluoropolymer. The titanium-containing dielectric filler has a compound represented by a general formula of MTiO3, wherein the M represents transition metal or alkaline earth metal. The total volume of the PTC material layer is calculated as 100%, and the titanium-containing dielectric filler accounts to for 5-15% by volume of the PTC material layer.
    Type: Grant
    Filed: September 28, 2022
    Date of Patent: May 21, 2024
    Assignee: POLYTRONICS TECHNOLOGY CORP.
    Inventors: Hsiu-Che Yen, Yung-Hsien Chang, Cheng-Yu Tung, Chen-Nan Liu, Chia-Yuan Lee, Yu-Chieh Fu, Yao-Te Chang, Fu-Hua Chu