Patents by Inventor A-Liang Chien

A-Liang Chien has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240153942
    Abstract: An integrated circuit is provided and includes a multi-bit cell having multiple bit cells disposed in multiple cell rows. The bit cells include M bit cells, M being positive integers. A first bit cell of the bit cells and a M-th bit cell of the bit cells are arranged diagonally in different cell rows in the multi-bit cell. The multi-bit cell includes first to fourth cell boundaries. The first and second boundaries extend in a first direction and the third and fourth boundaries extend in a second direction different from the first direction. The first bit cell and a second bit cell of the bit cells abut the third cell boundary, and the first bit cell and a (M/2+1)-th bit cell of the bit cells abut the first cell boundary.
    Type: Application
    Filed: January 17, 2024
    Publication date: May 9, 2024
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Shao-Lun CHIEN, Po-Chun WANG, Hui-Zhong ZHUANG, Chih-Liang CHEN, Li-Chun TIEN
  • Patent number: 11977756
    Abstract: A computer device, a setting method for a memory module, and a mainboard are provided. The computer device includes a memory module, a processor, and the mainboard. A basic input output system (BIOS) of the mainboard stores a custom extreme memory profile (XMP). When the processor executes the BIOS, so that the computer device displays a user interface (UI), the BIOS displays multiple default XMPs stored in the memory module and the custom XMP through the UI. The BIOS stores one of the default XMPs and the custom XMP to the memory module according to a selecting result of the one of the default XMPs and the custom XMP displayed on the UI.
    Type: Grant
    Filed: March 16, 2022
    Date of Patent: May 7, 2024
    Assignee: GIGA-BYTE TECHNOLOGY CO., LTD.
    Inventors: Chia-Chih Chien, Sheng-Liang Kao, Chen-Shun Chen, Chieh-Fu Chung, Hua-Yi Wu
  • Patent number: 11966133
    Abstract: An electronic device is disclosed. The electronic device includes a substrate, a plurality of color filters disposed on the substrate, an optical film disposed on the plurality of color filter, and a defect disposed between the substrate and the optical film. The optical film has a first base, a protective layer on the first base, and a second base between the first base and the protective layer and having a first processed area. In a top view of the electronic device, the first processed area corresponds to the defect and at least partially overlaps at least two color filters.
    Type: Grant
    Filed: May 18, 2023
    Date of Patent: April 23, 2024
    Assignee: INNOLUX CORPORATION
    Inventors: Tai-Chi Pan, Chin-Lung Ting, I-Chang Liang, Chih-Chiang Chang Chien, Po-Wen Lin, Kuang-Ming Fan, Sheng-Nan Chen
  • Patent number: 11955721
    Abstract: An antenna apparatus, a communication apparatus, and a steering adjustment method thereof are provided. The antenna apparatus includes an antenna structure. The antenna structure includes an antenna unit. The antenna unit includes i feeding ports, where i is a positive integer larger than 2. A vector of each of the feeding ports is controlled independently. In the steering adjustment method, a designated direction is determined, where the designated direction corresponds to beam directionality of the antenna structure. In addition, the vectors of the feeding ports of the antenna unit are configured according to the designated direction. Accordingly, the antenna size can be reduced, and beam steering in multiple directions would be achieved.
    Type: Grant
    Filed: November 18, 2019
    Date of Patent: April 9, 2024
    Assignee: Gemtek Technology Co., Ltd.
    Inventors: Chung-Kai Yang, Sin-Liang Chen, Hsu-Sheng Wu, Hsiao-Ching Chien
  • Publication number: 20240100872
    Abstract: A transfer-printing method of UV-digital stacked-thickness printing, which comprising following steps of: ink jetting a UV-ink on a carrier with low-adhesive-strength to the carrier to output a color-ink-layer with a mirrored-pattern and fully curing the color-ink-layer through UV-light-irradiation; ink jetting on the color-ink-layer to output a transparent-ink-layer with the same mirrored-pattern processed with gray-scale or binary-conversion, the transparent-ink-layer is divided into a plurality of regions, an inkjet-head ink jets back and forth within one region for multiple times and after ink jets the last time, cures the region through UV-light-irradiation with a low-irradiation-intensity, then the inkjet head moves forward to next region and ink jets back and forth within that region for multiple times; and pressing and transferring the transparent-ink-layer on the carrier onto a workpiece.
    Type: Application
    Filed: November 29, 2022
    Publication date: March 28, 2024
    Inventors: Chen-Chien TSAI, Liang SHIH
  • Publication number: 20240097720
    Abstract: A self-loopback radio transmitter having a transmitter with a modulator configured to up-convert a first baseband signal into a first RF (radio frequency) signal in accordance with a first LO (local oscillator) signal, and a power amplifier configured to receive the first RF signal and output a second RF signal to be emitted by an antenna and a third RF signal to be looped back, wherein the third RF signal is magnetically coupled from the second RF signal; and a loopback network having a shielded serial inductor configured to receive the third RF signal and output a fourth RF signal, and a demodulator configured to down-convert the fourth RF signal into a second baseband signal in accordance with a second LO signal, wherein the shielded serial inductor has a serial inductor of spiral topology and a coil laid out on a lower metal layer.
    Type: Application
    Filed: October 13, 2022
    Publication date: March 21, 2024
    Inventors: Chia-Liang (Leon) Lin, Ting-Hsu Chien
  • Patent number: 11916058
    Abstract: An integrated circuit is provided and includes a multi-bit cell having multiple bit cells disposed in multiple cell rows. The bit cells include M bit cells, M being positive integers. A first bit cell of the bit cells and a M-th bit cell of the bit cells are arranged diagonally in different cell rows in the multi-bit cell. The multi-bit cell includes first to fourth cell boundaries. The first and second boundaries extend in a first direction and the third and fourth boundaries extend in a second direction different from the first direction. The first bit cell and a second bit cell of the bit cells abut the third cell boundary, and the first bit cell and a (M/2+1)-th bit cell of the bit cells abut the first cell boundary.
    Type: Grant
    Filed: July 29, 2022
    Date of Patent: February 27, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Shao-Lun Chien, Po-Chun Wang, Hui-Zhong Zhuang, Chih-Liang Chen, Li-Chun Tien
  • Publication number: 20220098383
    Abstract: Described herein is a method for preparing polyurethane foams, including (1) placing a reaction mixture into a pressurizable chamber, and (2) polymerizing the reaction mixture at an additional pressure, where the reaction mixture comprises an isocyanate, an isocyanate-reactive compound and a blowing agent, and the reaction mixture is placed into the pressurizable chamber at a packing factor of 2.0-4.0. Also described herein is a polyurethane foam prepared by such a method.
    Type: Application
    Filed: January 28, 2020
    Publication date: March 31, 2022
    Inventors: Bang Wei Xi, YingHao Liu, Wei Liang Chien, Jin Lin Liu, Bo Chen
  • Patent number: 10892260
    Abstract: A capacitor includes a first transistor, a second transistor, and a control circuit. The first terminal of the first transistor is coupled to the first terminal of the capacitor. The first terminal of the second transistor is coupled to the second terminal of the capacitor. In a normal mode, the control circuit turns on the first transistor and the second transistor, the second terminal of the second transistor is coupled to the control terminal of the first transistor through the control circuit, and the control terminal of the second transistor is coupled to the second terminal of the first transistor through the control circuit. In a power saving mode, the control circuit turns off the first transistor and the second transistor.
    Type: Grant
    Filed: March 6, 2019
    Date of Patent: January 12, 2021
    Assignee: HIMAX TECHNOLOGIES LIMITED
    Inventors: Ping-Liang Chen, Chao-Liang Chien, Shih-Yi Tang
  • Publication number: 20200286885
    Abstract: A capacitor includes a first transistor, a second transistor, and a control circuit. The first terminal of the first transistor is coupled to the first terminal of the capacitor. The first terminal of the second transistor is coupled to the second terminal of the capacitor. In a normal mode, the control circuit turns on the first transistor and the second transistor, the second terminal of the second transistor is coupled to the control terminal of the first transistor through the control circuit, and the control terminal of the second transistor is coupled to the second terminal of the first transistor through the control circuit. In a power saving mode, the control circuit turns off the first transistor and the second transistor.
    Type: Application
    Filed: March 6, 2019
    Publication date: September 10, 2020
    Applicant: HIMAX TECHNOLOGIES LIMITED
    Inventors: Ping-Liang Chen, Chao-Liang Chien, Shih-Yi Tang
  • Patent number: 10643529
    Abstract: A method for compensating brightness non-uniformity of a display panel, and associated display device is provided. The display panel may include a plurality of display blocks, each of the plurality of display blocks may includes one or more display units, and the method includes: according to a control signal, selecting a voltage detection terminal of a display block within the plurality of display blocks, wherein the control signal carries information indicating the display block; according to a voltage level of the voltage detection terminal, generating a plurality of reference voltages; and based on the plurality of reference voltages, driving a display voltage to a display unit within the display block according to a set of display data.
    Type: Grant
    Filed: December 18, 2018
    Date of Patent: May 5, 2020
    Assignee: HIMAX TECHNOLOGIES LIMITED
    Inventors: Chao-Liang Chien, Meng-Wei Shen
  • Publication number: 20200030655
    Abstract: A spinning bike includes a transmission wheel, a flywheel and a resistance braking device. The transmission wheel is disposed on the bike frame. The flywheel is made of the metal material, and driven by the transmission wheel to rotate. The resistance braking device includes a magnet assembly, a resistance adjustment member, a control member, a manual brake assembly and a resistance control assembly. The resistance adjustment member is connected to the bike frame. The magnet assembly is pivotally connected on the resistance adjustment member. The control member is connected to the magnet assembly. The manual brake assembly is disposed on a handlebar of the bike frame, and includes a brake handle and a brake control wire. The resistance control assembly includes a motor, a control interface and a resistance control wire.
    Type: Application
    Filed: July 26, 2018
    Publication date: January 30, 2020
    Inventors: SHU-YAO WU, LIAN-FA LIN, PAI-LIANG CHIEN, SHIANG-YIN CHIOU
  • Patent number: 10036854
    Abstract: A digital roller mold manufacturing system for manufacture of exterior characteristic structures on a roller mold depends on an illuminator for generation and projection of a light source on a Digital Mirror Device (DMD) chip in which micro-mirrors are rotated a controllable angle for defining the light source as an optical image and projecting the optical image on first micro-lenses at which digital light energy is transformed from the optical image and transmitted to first optical fibers, second optical fibers via couplers, and second micro-lenses. Furthermore, the second micro-lenses focus the digital light energy as light spots which are received by a photo-resist layer externally covered on the roller for development of patterns with exterior characteristic structures on the roller mold because a control unit regulates rotations of the roller and horizontal shifts of second micro-lenses.
    Type: Grant
    Filed: December 9, 2015
    Date of Patent: July 31, 2018
    Assignee: NATIONAL CHENG KUNG UNIVERSITY
    Inventors: Yung-Chun Lee, Hung-Liang Chien
  • Publication number: 20180059475
    Abstract: An optics component with double-layered micro-lens array includes mainly complex pinhole structures in array arrangement on one substrate face, and either substrate face has an optical micro-lens array. Both optical micro-lens arrays include a plurality of aspheric micro-lenses corresponding to the pinhole structures. When the component is in use, a UV light reflected by a DMD wafer is focused onto each pinhole structure through the plurality of aspheric micro-lenses in the optical micro-lens array of one face of a crystal substrate, and a small spot is formed, which may begin to diffuse after passing through the pinhole structure. Then, the beam is focused onto another face by the plurality of aspheric micro-lenses of another substrate face to obtain a small spot with a small circular spot approaching physical diffraction limit. The formed spot arrays can be applied to the scanning maskless and direct-write exposure lithography process.
    Type: Application
    Filed: August 24, 2017
    Publication date: March 1, 2018
    Inventors: Yung-Chun LEE, Hung-Liang CHIEN
  • Publication number: 20160349618
    Abstract: A digital roller mold manufacturing system for manufacture of exterior characteristic structures on a roller mold depends on an illuminator for generation and projection of a light source on a Digital Mirror Device (DMD) chip in which micro-mirrors are rotated a controllable angle for defining the light source as an optical image and projecting the optical image on first micro-lenses at which digital light energy is transformed from the optical image and transmitted to first optical fibers, second optical fibers via couplers, and second micro-lenses. Furthermore, the second micro-lenses focus the digital light energy as light spots which are received by a photo-resist layer externally covered on the roller for development of patterns with exterior characteristic structures on the roller mold because a control unit regulates rotations of the roller and horizontal shifts of second micro-lenses.
    Type: Application
    Filed: December 9, 2015
    Publication date: December 1, 2016
    Inventors: Yung-Chun Lee, Hung-Liang Chien
  • Patent number: 9491080
    Abstract: An indicator circuit comprises a first logic circuit, a second logic circuit, a third logic circuit, an auxiliary power circuit, a switch circuit, and a light emitting diode (LED) circuit. The switch circuit controls whether the LED circuit lights or not, according to the first logic circuit, the second logic circuit, and the third logic circuit, to indicate connections to different data bandwidths.
    Type: Grant
    Filed: September 9, 2014
    Date of Patent: November 8, 2016
    Assignee: HON HAI PRECISION INDUSTRY CO., LTD.
    Inventor: Tung-Liang Chien
  • Publication number: 20160259044
    Abstract: A three-dimensional positioning system includes establishing a geometric model for optical AND radar sensors, obtaining rational function conversion coefficients, refining the rational function model and positioning three-dimensional coordinates. The system calculates rational polynomial coefficients from a geometric model of optical AND radar sensors, followed by refining a rational function model by determined ground control points and object image space intersection. The system then measures one or more conjugate points on the optical and radar images. Finally, an observation equation is established by the rational function model to solve and display three-dimensional coordinates.
    Type: Application
    Filed: May 17, 2016
    Publication date: September 8, 2016
    Inventors: Liang-Chien Chen, Chin-Jung Yang
  • Publication number: 20160152517
    Abstract: A method of edge coating includes preparing a stack including a plurality of articles interleaved with spacer pads. A layer of coating material is formed on a surface of a coating roller. A perimeter of the stack is positioned at a select coating gap relative to the surface of the coating roller, and the coating material is transferred from the surface of the coating roller to perimeter edges of the articles in the stack.
    Type: Application
    Filed: November 30, 2015
    Publication date: June 2, 2016
    Inventors: Yu-Chin Chen, Liang-Chien Cheng, Tien-San Chi, Chao-Yin Chuang, Matthew John Towner, Kevin William Uhlig, Thomas Achille Yorio
  • Patent number: 9171759
    Abstract: A semiconductor wafer having a plurality of chip die areas arranged on a wafer in an array, each chip die area including a seal ring area with one or more first sets of polygonal structures. The wafer further comprises scribe line areas between the chip die areas, the scribe line areas including one or more second sets of polygonal structures. The presence of proximate polygonal structures between the scribe line and seal ring areas balance stresses between the chip die areas during wafer dicing operation.
    Type: Grant
    Filed: December 18, 2012
    Date of Patent: October 27, 2015
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chia-Pin Cheng, Jung-Liang Chien, Chih-Kang Chao, Chi-Cherng Jeng, Hsin-Chi Chen, Ying-Lang Wang
  • Publication number: 20150287292
    Abstract: An indicator circuit comprises a first logic circuit, a second logic circuit, a third logic circuit, an auxiliary power circuit, a switch circuit, and a light emitting diode (LED) circuit. The switch circuit controls whether the LED circuit lights or not, according to the first logic circuit, the second logic circuit, and the third logic circuit, to indicate connections to different data bandwidths.
    Type: Application
    Filed: September 9, 2014
    Publication date: October 8, 2015
    Applicant: HON HAI PRECISION INDUSTRY CO., LTD.
    Inventor: TUNG-LIANG CHIEN