Patents by Inventor A. Lin

A. Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12019378
    Abstract: A method includes: removing debris on a collector of a lithography equipment by changing physical structure of the debris with a cleaner, the cleaner being at a temperature less than about 13 degrees Celsius; forming a cleaned collector by exhausting the removable debris from the collector; and forming openings in a mask layer on a substrate by removing regions of the mask layer exposed to radiation from the cleaned collector.
    Type: Grant
    Filed: May 23, 2022
    Date of Patent: June 25, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Cho-Ying Lin, Tai-Yu Chen, Chieh Hsieh, Sheng-Kang Yu, Shang-Chieh Chien, Li-Jui Chen, Heng-Hsin Liu
  • Patent number: 12019744
    Abstract: Apparatuses, systems, devices, and computer program products for deterrence techniques are described. A method may include processing data from an outdoor camera. A method may include detecting a person based at least in part on processed data from an outdoor camera. A method may include emitting a sound from an outdoor camera to deter a person in response to detecting the person.
    Type: Grant
    Filed: July 7, 2022
    Date of Patent: June 25, 2024
    Assignee: Vivint, Inc.
    Inventors: Brandon Bunker, Rongbin Lanny Lin
  • Patent number: 12018055
    Abstract: Provided herein is a method for preventing or treating an Epstein-Barr virus (EBV) infection, including administering to the subject in need thereof with an effective amount of immunomodulatory protein of Ganoderma, a recombinant thereof, or a fungal immunomodulatory protein of a similar structure. Also provided is a method for preventing or treating an EBV-associated cancer.
    Type: Grant
    Filed: November 23, 2022
    Date of Patent: June 25, 2024
    Assignee: NATIONAL YANG MING CHIAO TUNG UNIVERSITY
    Inventors: Ming-Han Tsai, Tung-Yi Lin
  • Patent number: 12020602
    Abstract: The present disclosure provides an electronic device including a substrate, a first circuit layer, and a plurality of diodes. The substrate has a plurality of first through holes. The first circuit layer is disposed on the substrate and has a plurality of light through holes. The diodes disposed on the first circuit layer. One of the light through holes is located between two adjacent ones of the diodes, and the light through holes overlap a portion of the plurality of first through holes and do not overlap another portion of the plurality of first through holes in a normal direction of the substrate.
    Type: Grant
    Filed: September 26, 2023
    Date of Patent: June 25, 2024
    Assignee: InnoLux Corporation
    Inventors: Chin-Lung Ting, Chung-Kuang Wei, Li-Wei Mao, Chi-Liang Chang, Chia-Hui Lin
  • Patent number: 12017931
    Abstract: A static water sterilization module is provided according to the present application, which includes a lamp holder, a light-transmitting plate, a lamp plate, a sterilization lamp, a first sealing ring, a clamping member and a waterproof potting adhesive. The light-transmitting plate is mounted on the lamp holder. The lamp plate is mounted in the lamp holder. The sterilization lamp is mounted on the lamp plate. An inner surface of the lamp plate, an inner surface of the light-transmitting plate and an inner wall of the lamp holder form a sealing chamber for mounting the sterilization lamp. The first sealing ring abuts against an outer surface of the lamp plate. The clamping member is configured to press the first sealing ring and the lamp plate. The waterproof potting adhesive is configured to encapsulate a base chamber between the outer surface of the lamp plate and the lamp holder.
    Type: Grant
    Filed: December 16, 2021
    Date of Patent: June 25, 2024
    Assignee: NINGBO SUNPU LED CO., LTD.
    Inventors: Yaohua Zhang, Yuanbao Du, Zhongjie Lin, Mingda Xu, Yingguo Yang, Fusheng Chen, Xiaoqing Zhu, Qinghao Zhang
  • Patent number: 12021054
    Abstract: Redistribution layers of integrated circuits include one or more arrays of conductive contacts that are configured and arranged to allow a bonding wave to displace air between the redistribution layers during bonding. This configuration and arrangement of the one or more arrays minimize discontinuities, such as pockets of air to provide an example, between the redistribution layers during the bonding.
    Type: Grant
    Filed: July 31, 2023
    Date of Patent: June 25, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Cheng-Yuan Li, Kuo-Cheng Lee, Yun-Wei Cheng, Yen-Liang Lin
  • Patent number: 12018934
    Abstract: A method for identifying installation positions of sensors, which predefines the corresponding relationship between the first sliding member, the second sliding member and the signal features according to the installation directions of the sensors, and then drives the first sliding member and the second sliding member of one of the feed systems to move to obtain and analyze the three-axis signals fed back from the sensors, firstly select responsive three-axis signals, and then determine the axis with the largest response of the three-axis signals so as to identify the sensor installed on the first sliding member. Then, the corresponding relationship between the remaining three-axis signals and the sensors installed on the second sliding members is identified based on the dynamic signal feature and the static signal feature, so as to achieve the purpose of automatically identifying the installation position of the respective sensors.
    Type: Grant
    Filed: January 24, 2022
    Date of Patent: June 25, 2024
    Assignee: Hiwin Technologies Corp.
    Inventor: Yu-Hsin Lin
  • Patent number: 12020414
    Abstract: The present disclosure relates to an object selection system that accurately detects and automatically selects target instances of user-requested objects (e.g., a query object instance) in a digital image. In one or more embodiments, the object selection system can analyze one or more user inputs to determine an optimal object attribute detection model from multiple specialized and generalized object attribute models. Additionally, the object selection system can utilize the selected object attribute model to detect and select one or more target instances of a query object in an image, where the image includes multiple instances of the query object.
    Type: Grant
    Filed: August 15, 2022
    Date of Patent: June 25, 2024
    Assignee: Adobe Inc.
    Inventors: Scott Cohen, Zhe Lin, Mingyang Ling
  • Patent number: 12019003
    Abstract: A method of preventing and handling indoor air pollution is disclosed and includes: providing a portable gas detection device to monitor the air quality in the indoor environment; disposing 1˜75 gas exchangers within the indoor space to inhale outdoor gas, purify and filter the inhaled gas, and introduce the inhaled gas into the indoor space; and remotely controlling the gas exchangers to enable filtration, purification and gas exchange procedure by the portable gas detection device when the portable gas detection device detects an air pollutant in the indoor space, to reduce the air pollutant in the indoor space under a safe detection value within 1 minute, and form a breathable gas, and the air pollutant in the gas in the indoor space is exchanged and exported out to outdoor environment, the gas exchangers have an exported airflow rate of 200˜1600 CADR, and the indoor space has a volume of 16.5˜247.5 m3.
    Type: Grant
    Filed: August 13, 2021
    Date of Patent: June 25, 2024
    Assignee: MICROJET TECHNOLOGY CO., LTD.
    Inventors: Hao-Jan Mou, Ching-Sung Lin, Chin-Chuan Wu, Chi-Feng Huang, Yung-Lung Han, Chang-Yen Tsai, Wei-Ming Lee
  • Patent number: 12021304
    Abstract: A multi-beam antenna module includes a radio frequency circuit board, a plurality of reflecting plates and a plurality of area coverage feed antenna groups. Each of the area coverage feed antenna groups includes a feed antenna. The reflecting plates have different arrangement directions, and each of the reflecting plates is arranged relative to the feed antenna of each of the area coverage feed antenna groups, thereby changing a radiation pattern of the feed antenna of each of the area coverage feed antenna groups to deflect a main radiation direction of the feed antenna of each of the area coverage feed antenna groups.
    Type: Grant
    Filed: July 14, 2022
    Date of Patent: June 25, 2024
    Assignee: WANSHIH ELECTRONIC CO., LTD.
    Inventor: Hung-Hsuan Lin
  • Patent number: 12020962
    Abstract: The present disclosure provides a measuring system. The measuring system includes an insulative tube, a capacitor and a static charge meter. The insulative tube is configured to allow a fluid to flow therethrough. The capacitor is disposed on a surface of a section of the insulative tube. The capacitor includes a first metallic layer, a second metallic layer opposite to the first metallic layer, and a dielectric layer sandwiched between the first metallic layer and the second metallic layer. The static charge meter is electrically coupled to the capacitor and configured to measure static charge accumulated inside the section of the insulative tube.
    Type: Grant
    Filed: August 30, 2021
    Date of Patent: June 25, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Tzu-Sou Chuang, Chwen Yu, En Tian Lin, Chi Wen Kuo
  • Patent number: 12021047
    Abstract: An embodiment is a device including an integrated circuit die having an active side and a back side, the back side being opposite the active side, a molding compound encapsulating the integrated circuit die, and a first redistribution structure overlying the integrated circuit die and the molding compound, the first redistribution structure including a first metallization pattern and a first dielectric layer, the first metallization pattern being electrically coupled to the active side of the integrated circuit die, at least a portion of the first metallization pattern forming an inductor.
    Type: Grant
    Filed: April 22, 2022
    Date of Patent: June 25, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chung-Hao Tsai, Chia-Chia Lin, Kai-Chiang Wu, Chuei-Tang Wang, Chen-Hua Yu
  • Patent number: 12019211
    Abstract: An optical imaging lens includes a first lens element, a second lens, a third lens element and a fourth lens element from an object side to an image side in order along an optical axis. An optical axis region of the object-side surface of the first lens element is convex, and an optical axis region of the image-side surface of the third lens element is concave. The lens elements included by the optical imaging lens are only the four lens elements described above. Tavg is an average of four thicknesses from the first lens element to the fourth lens element along the optical axis, an Abbe number of the first lens element is ?1, and an Abbe number of the second lens element is ?2 so that the optical imaging lens satisfies: Tavg?300 ?m, and |?1??2|?30.000.
    Type: Grant
    Filed: March 25, 2021
    Date of Patent: June 25, 2024
    Assignee: Genius Electronic Optical (Xiamen) Co., Ltd.
    Inventors: Huabin Liao, Hai Lin, Wei-Jeh Kao, Chuanbo Dong, Hung-Chien Hsieh
  • Patent number: 12021002
    Abstract: A semiconductor die includes a semiconductor substrate, a dielectric layer over the semiconductor substrate, a metal structure in the dielectric layer, a first metal pad over the metal structure, a first oxide-based passivation layer over the first metal pad, a second oxide-based passivation layer over the first oxide-based passivation layer, and a bump electrically connected to the first metal pad. The second oxide-based passivation layer has a hardness less than a hardness of the first oxide-based passivation layer.
    Type: Grant
    Filed: August 9, 2022
    Date of Patent: June 25, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Yun-Ting Wang, Yi-An Lin, Ching-Chuan Chang, Po-Chang Kuo
  • Patent number: 12019481
    Abstract: A keyboard including an electronic paper display module, a front light module, a supporting member, a light-transmitting keycap, and an elevating support is provided. The front light module is disposed on the electronic paper display module. The supporting member is disposed on the front light module. The supporting member includes an elastic supporting protrusion and a light guide part embedded in the elastic supporting protrusion, and the elastic supporting protrusion has an opening exposing a portion of the front light module. The light guide part is located in the opening of the elastic supporting protrusion. The light-transmitting keycap is disposed on the elastic supporting protrusion and covers the opening of the elastic supporting protrusion. The elevating support is disposed between the light-transmitting keycap and the front light module.
    Type: Grant
    Filed: July 1, 2022
    Date of Patent: June 25, 2024
    Assignee: Acer Incorporated
    Inventors: Hung-Chi Chen, Cheng-Han Lin
  • Patent number: 12021091
    Abstract: The present disclosure provides an array substrate and a preparation method thereof, belonging to the field of display technology. The preparation method of the array substrate includes: providing a base substrate; forming a common electrode bonding line on one side of the base substrate; forming an oxide semiconductor material layer, and the oxide semiconductor material layer and the common electrode bonding line are located on the base substrate on the same side, and the oxide semiconductor material layer is electrically connected to at least part of the common electrode bonding line; the oxide semiconductor material layer is patterned to form an oxide semiconductor layer with multiple active layers, and the oxide semiconductor layer is The orthographic projection on the base substrate and the common electrode bonding line overlap at most parts of the orthographic projection on the base substrate, and any active layer and the common electrode bonding line are insulated from each other.
    Type: Grant
    Filed: September 25, 2020
    Date of Patent: June 25, 2024
    Assignees: FUZHOU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Bin Lin, Yong Zeng, Yazhou Huo, Liangliang Li, Zhouyu Chen
  • Patent number: 12019540
    Abstract: A method for managing a memory apparatus including a plurality of physical blocks, and a volatile memory includes: obtaining a first host address and first data, and obtaining a second host address and second data; linking the first host address and second host address to a first page and second page of the physical block, and storing the first data and second data into the physical block; building a valid/invalid page count table according to a valid/invalid page count of the physical block; building a valid page position table according to the valid/invalid page count table, and storing the valid/invalid page count table in the volatile memory; and when a valid/invalid page count of the physical block indicates the physical block should be erased, using the valid page position table to move valid pages of the physical block to another physical block.
    Type: Grant
    Filed: July 5, 2023
    Date of Patent: June 25, 2024
    Assignee: Silicon Motion, Inc.
    Inventors: Tsai-Cheng Lin, Chun-Kun Lee
  • Patent number: 12022643
    Abstract: A transistor includes a gate structure that has a first gate dielectric layer and a second gate dielectric layer. The first gate dielectric layer is disposed over the substrate. The first gate dielectric layer contains a first type of dielectric material that has a first dielectric constant. The second gate dielectric layer is disposed over the first gate dielectric layer. The second gate dielectric layer contains a second type of dielectric material that has a second dielectric constant. The second dielectric constant is greater than the first dielectric constant. The first dielectric constant and the second dielectric constant are each greater than a dielectric constant of silicon oxide.
    Type: Grant
    Filed: September 29, 2020
    Date of Patent: June 25, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chih-Yu Hsu, Jian-Hao Chen, Chia-Wei Chen, Shan-Mei Liao, Hui-Chi Chen, Yu-Chia Liang, Shih-Hao Lin, Kuei-Lun Lin, Kuo-Feng Yu, Feng-Cheng Yang, Yen-Ming Chen
  • Patent number: 12020102
    Abstract: Example embodiments of systems and methods for card production are provided. A card may include processing circuitry including a chip and memory. The card may include one or more antennas in communication with the chip. The card may include a first layer of material aligned within a perimeter of the card via laminate encapsulation. The first layer of material may comprise a non-rectangular shape. The first layer of material may be offset with a shape of the card. The first layer of material may be in communication with the chip. The first layer of material may comprise at least one selected from the group of steel, tungsten, titanium, or any combination thereof. The card may be compliant with one or more form factors.
    Type: Grant
    Filed: April 11, 2023
    Date of Patent: June 25, 2024
    Assignee: CAPITAL ONE SERVICES, LLC
    Inventors: Daniel Herrington, Suzanne Parker, Adrian Garner, Lin Ni Lisa Cheng
  • Patent number: 12021119
    Abstract: A semiconductor structure includes a source/drain (S/D) feature; one or more channel semiconductor layers connected to the S/D feature; a gate structure engaging the one or more channel semiconductor layers; a first silicide feature at a frontside of the S/D feature; a second silicide feature at a backside of the S/D feature; and a dielectric liner layer at the backside of the S/D feature, below the second silicide feature, and spaced away from the second silicide feature by a first gap.
    Type: Grant
    Filed: July 25, 2023
    Date of Patent: June 25, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Lin-Yu Huang, Li-Zhen Yu, Chia-Hao Chang, Cheng-Chi Chuang, Kuan-Lun Cheng, Chih-Hao Wang