Abstract: A plurality of workpieces include a plurality of first workpieces of a first workpiece group to be loaded onto a first loaded member according to a first loading sequence and a plurality of second workpieces of a second workpiece group to be loaded onto a second loaded member according to a second loading sequence. On a conveying device, workpieces are arranged at ransom with respect to respective arrangement sequences of the first workpiece group and the second workpiece group and the classifications of the first workpiece group and the second workpiece group. On a conveying device, workpieces of the first workpiece group are sequentially arranged based on the first loading sequence and workpieces of the second workpiece group are sequentially arranged based on the second loading sequence. At the same time, the workpieces of the first workpiece group and the second workpiece group are arranged together.

Abstract: To appropriately control intra-slot frequency hopping of an uplink channel/signal. A user terminal of the present invention includes a transmitting section that transmits an uplink control channel in one slot or over a plurality of slots, a receiving section that receives information related to a frequency resource to which the uplink control channel is to be mapped, and a control section that controls frequency hopping of the uplink control channel in each slot, based on the information related to the frequency resource.

Abstract: To properly control half-duplex communication in future radio communication systems, a user terminal according to one aspect of the present disclosure has a receiving section that receives slot format information for designating a slot format of a cell, and a control section that determines a slot format in each cell based on at least one of content designated by each slot format information and a signal type used in transmission of each slot format information, in the case of receiving a plurality of pieces of slot format information.

Abstract: A method for separating and recovering a layered film laminated and adhered with a reactive adhesive, the method including a step 1 of immersing the layered film in an alkaline solution while stirring the layered film with heating at 20° C. to 90° C. or ultrasonically vibrating the layered film and a step 2 of recovering separated single-layered films that constitute the respective layers of the layered film. The reactive adhesive is preferably a reactive adhesive containing a polyisocyanate composition and a polyol composition and more preferably a reactive adhesive containing a polyisocyanate composition, a polyol composition, and a compound having an acidic group.

Abstract: A display image to be displayed on a display unit is obtained in accordance with motion of a viewpoint of a driver, on the basis of a captured image obtained by capturing an image on a rear side from a vehicle, when a line-of-sight of the driver is in a certain region including the display unit. For example, the display image is obtained in accordance with a deviation of a viewpoint position of the driver from a reference viewpoint position. For example, the reference viewpoint position is updated on the basis of a long-term fluctuation of the viewpoint position. For example, the reference viewpoint position is not updated when a line-of-sight of the driver is in a certain region including a display unit that displays a display image.

Abstract: A terminal receives a downlink data channel common to a group of terminals in data distribution for a plurality of terminals. The terminal assumes that the quasi collocation of the downlink data channel is a specific state common to a plurality of terminals when a specific condition is satisfied.

Abstract: A semiconductor device according to the present disclosure includes a semiconductor substrate having a first surface and a second surface opposite to the first surface, and a diode formed in the semiconductor substrate. The diode includes a drift layer of a first conductivity type on a side provided with the first surface, an anode layer of a second conductivity type opposite in conductivity type to the first conductivity type on the drift layer, and a trench. A bottom surface of the anode layer is located in a region deeper than a bottom surface of the trench with reference to the first surface.

Abstract: The present invention provides: a multilayer film structure which has high crystallinity and planarity; and a method for producing this multilayer film structure. This multilayer film structure is provided with: an Si (111) substrate; a first thin film that is arranged on the Si (111) substrate, while being formed of a nitride material and/or aluminum; and a second thin film that is arranged on the first thin film, while being formed of a nitride material. An amorphous layer having a thickness of 0 nm or more but less than 1.0 nm are present on the Si (111) substrate; and the full width at half maximum (FWHM) of a rocking curve of the (0002) plane at the surface of this multilayer film structure is 1.50° or less.

Abstract: A speech reproduction control system includes a speech reproducer that reproduces speech data in speech, a character reproducer that converts the speech data into characters for reproduction, and a hardware processor that reproduces first speech data and second speech data in parallel, wherein the hardware processor reproduces the first speech data by using the character reproducer, turns off reproduction of the first speech data by the speech reproducer or reproduces the first speech data at a volume lower than a volume for reproduction of the second speech data, and reproduces the second speech data by using the speech reproducer.

Abstract: Processors, systems and methods are provided for thread level parallel processing. A processor may include a sequencer configured to: decode instructions that include scalar instructions and vector instructions, execute decoded scalar instructions, and package decoded vector instructions as configurations. The processor may further include a plurality of columns of vector processing units coupled to the sequencer. The plurality of columns of vector processing units may include a plurality of processing elements (PEs) and each of the PEs may include a plurality of Arithmetic Logic Units (ALUs). The sequencer may be configured to send the configurations to the plurality of columns of vector processing units.

Abstract: A reflective mask blank includes a substrate; a multilayer reflective film that reflects EUV light; a protection film that protects the multilayer reflective film; and a phase shift film that shifts a phase of the EUV light. The substrate, the multilayer reflective film, the protection film, and the phase shift film are arranged in this order. The phase shift film is made of an Ir-based material containing Ir as a main component, and the protection film is made of a Rh-based material containing Rh as a main component.

Abstract: A catalyst for production of carboxylic acid ester, containing: catalyst metal particles; and a support supporting the catalyst metal particles, wherein a bulk density of the catalyst for production of carboxylic acid ester is 0.50 g/cm3 or more and 1.50 g/cm3 or less, when a particle diameter, at which a cumulative frequency is x % in a particle diameter distribution based on a volume of the catalyst for production of carboxylic acid ester, is defined as Dx, D10/D50?0.2 and D90/D50?2.5 are satisfied, and when a half-width of the particle diameter distribution is defined as W, W/D50?1.5 is satisfied.

Abstract: An overcurrent protection circuit includes, for example, a first node to which the first electrode of an overcurrent sense resistor is connected, a second node to which the second electrode of the overcurrent sense resistor and the main electrode of an output transistor are connected, a third node to which the control electrode of the output transistor is connected, a voltage source generating a reference voltage by adding or subtracting an offset voltage to or from the terminal voltage at the first node, a hysteresis setting resistor and an overcurrent protection transistor connected in series between the second node and the third node to output a sense voltage from a fourth node between them, and an operational amplifier controlling the overcurrent protection transistor according to the difference between the reference voltage and the sense voltage.

Abstract: Processors, systems and methods are provided for thread level parallel processing. A processor may include a plurality of columns of vector processing units arranged in a two-dimensional column array with a plurality of column stacks placed side-by-side in a first direction and each column stack having two columns stacked in a second direction and a temporary storage buffer. Each column may include a processing element (PE) that has a vector Arithmetic Logic Unit (ALU) to perform arithmetic operations in parallel threads. At a first end of the column array in the first direction, two columns in the column stack are coupled to the temporary storage buffer for one-way data flow. At a second end of the column array in the first direction, two columns are coupled to each other for one-way data flow. The column array and the temporary storage buffer may form a one-way circular data path.

Abstract: A processor may include a plurality of columns of vector processing units arranged in a two-dimensional column array with a plurality of column stacks placed side-by-side in a first direction and each column stack having two columns stacked in a second direction. The processor may further include a memory unit divided into two portions placed on two opposite sides of the column array in the second direction. Each portion may contain two memory blocks placed side-by-side in the first direction. Each memory block may contain two cache blocks placed along a first edge abutting an adjacent memory block and a plurality banks of memory cells placed to space from the first edge in the first direction by the two cache blocks and from a second edge abutting the column array in the second direction by routing channels.

Abstract: A terminal includes a communication unit configured to perform communication based on half-duplex frequency division duplex; and a control unit configured to perform a first process and a second process, the first process being performed to determine a signal to receive or a signal to transmit when a downlink signal and an uplink signal overlap in a time domain during the communication, and the second process being performed to determine the signal to transmit when a plurality of uplink signals overlap in the time domain during the communication. In this terminal, the control unit determines whether to perform the first process or the second process first, and the communication unit receives or transmits a signal that is obtained based on a result of performing at least one of the first process and the second process.

Abstract: A terminal according to one aspect of the present disclosure includes: a control section that determines a first control resource set (CORESET) to be preferentially monitored out of a plurality of CORESETs, based on a rule; and a receiving section that, when monitoring occasions of the first CORESET having one or more transmission configuration indication states (TCI states) and a second CORESET having one or more TCI states overlap, controls monitoring of a downlink control channel (PDCCH) in the second CORESET, based on the one or more TCI states of the first CORESET and the one or more TCI states of the second CORESET. According to one aspect of the present disclosure, collision of a plurality of downlink control channels can be appropriately addressed.

Abstract: A Ni-plated steel sheet according to one aspect of the present invention includes a base steel sheet; and a Ni plating layer provided on a surface of the base steel sheet, wherein the Ni plating layer includes a Ni—Fe alloy layer formed on the surface of the base steel sheet, and a ratio of a Sn content to a Ni content in the Ni plating layer is 0.0005% to 0.10%.

Abstract: A solid-state image sensor according to the present disclosure includes a first semiconductor substrate having a photoelectric conversion element and a second semiconductor substrate facing the first semiconductor substrate with an insulating film interposed therebetween, in which the second semiconductor substrate has an amplification transistor that amplifies an electrical signal output from the photoelectric conversion element on a first main surface (MSa), has a region having a resistance lower than a resistance of the second semiconductor substrate on a second main surface (MSb) opposite to the first main surface (MSa), and is grounded via the region.

Abstract: An endoscope includes: an objective optical system including a lens, allowing light from an imaging subject to be incident on a distal end surface, and focusing the light onto an image-capturing surface of an image-capturing element; an elongated light guide provided adjacent to a side of the system and guiding illumination light to be emitted from a distal end; and an optically transparent distal end cover disposed at a position where the distal end of the guide is covered, wherein the distal end surface is located farther forward than the distal end of the guide, a notched portion is provided at a distal-end outer edge of a side surface of the system, the side surface being adjacent to the guide, so that the system is narrower toward a front side from the distal end of the guide, and the cover is provided so as to bulge toward the notched portion.