Patents by Inventor A. Paul Brokaw

A. Paul Brokaw has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9608515
    Abstract: A circuit and method to filter a signal is provided. The circuit includes a notch filter circuit to receive an input signal and first and second tuning signals and to provide an output signal. The notch filter circuit has an input-output frequency response that includes a stopband region. The stopband region has a center frequency and has an attenuation level that is based at least on a tuning signal. The tunable filter circuit further includes a tuning circuit operable in at least two modes to generate the tuning signal. The at least two modes includes a tuning mode and a filtering mode. The tuning circuit generates the tuning signal such that the attenuation level of the stopband region is greater in the filtering mode than in the tuning mode.
    Type: Grant
    Filed: February 25, 2015
    Date of Patent: March 28, 2017
    Assignee: Analog Devices Global
    Inventors: Patrick J Meehan, Thomas Conway, Adrian Paul Brokaw, Donal G. O'Sullivan
  • Publication number: 20160248319
    Abstract: A circuit and method to filter a signal is provided. The circuit includes a notch filter circuit to receive an input signal and first and second tuning signals and to provide an output signal. The notch filter circuit has an input-output frequency response that includes a stopband region. The stopband region has a center frequency and has an attenuation level that is based at least on a tuning signal. The tunable filter circuit further includes a tuning circuit operable in at least two modes to generate the tuning signal. The at least two modes includes a tuning mode and a filtering mode. The tuning circuit generates the tuning signal such that the attenuation level of the stopband region is greater in the filtering mode than in the tuning mode.
    Type: Application
    Filed: February 25, 2015
    Publication date: August 25, 2016
    Inventors: Patrick J. Meehan, Thomas Conway, Adrian Paul Brokaw, Donal G. O'Sullivan
  • Patent number: 9213351
    Abstract: A bidirectional current sensor circuit can be configured to generate a scaled version of a load current using a first transistor from a power regulator output stage and a second transistor that can be a mirror or scaled version of the first transistor. A trim circuit can be provided to correct gain errors under current sinking or current sourcing conditions. In an example, the bidirectional current sensor circuit can be configured to detect a polarity or a magnitude of a current signal that is used to operate a thermoelectric device.
    Type: Grant
    Filed: November 22, 2013
    Date of Patent: December 15, 2015
    Assignee: Analog Devices, Inc.
    Inventors: Hio Leong Chao, A. Paul Brokaw
  • Publication number: 20150145588
    Abstract: A bidirectional current sensor circuit can be configured to generate a scaled version of a load current using a first transistor from a power regulator output stage and a second transistor that can be a mirror or scaled version of the first transistor. A trim circuit can be provided to correct gain errors under current sinking or current sourcing conditions. In an example, the bidirectional current sensor circuit can be configured to detect a polarity or a magnitude of a current signal that is used to operate a thermoelectric device.
    Type: Application
    Filed: November 22, 2013
    Publication date: May 28, 2015
    Applicant: Analog Devices, Inc.
    Inventors: Hio Leong Chao, A. Paul Brokaw
  • Patent number: 8624818
    Abstract: Energy sharing circuits and related methods are disclosed herein. A high voltage can be selectively coupled to a first source line and a low voltage can be selectively coupled to a second source line during a first time period. During a subsequent time period, a first coupling switch is activated to inductively couple the first source line to the second source line and diode block the second source line from the first source line. During a subsequent time period, the low voltage is selectively coupled to the first source line and the high voltage is selectively coupled to the second source line. During a subsequent time period, a second coupling switch is activated to inductively couple the second source line to the first source line and diode block the first source line from the second source line.
    Type: Grant
    Filed: March 3, 2011
    Date of Patent: January 7, 2014
    Assignee: Integrated Device Technology, Inc.
    Inventors: A. Paul Brokaw, June Her, Jeffrey G. Barrow
  • Publication number: 20130300487
    Abstract: A semiconductor switch comprises a PNPN structure arranged to provide an SCR-like functionality, and a MOS gate structure, preferably integrated on a common substrate. The switch includes ohmic contacts for the MOS gate, and for the cathode and gate regions of the PNPN structure; the anode contact is intrinsic. A fixed voltage is typically applied to an external node. The MOS gate structure allows current to be conducted between the external node and the intrinsic anode when on, and the PNPN structure conducts the current from the anode to the cathode when an appropriate voltage is applied to the gate contact. Regenerative feedback keeps the switch on once it begins to conduct. The MOS gate inhibits the flow of current between the external node and anode—and thereby turns off the switch—when off. When on, the MOS gate's channel resistance serves as a ballast resistor.
    Type: Application
    Filed: July 18, 2013
    Publication date: November 14, 2013
    Inventors: Jeffrey G. Barrow, Javier A. Salcedo, A. Paul Brokaw
  • Patent number: 8519432
    Abstract: A semiconductor switch comprises a PNPN structure arranged to provide an SCR-like functionality, and a MOS gate structure, preferably integrated on a common substrate. The switch includes ohmic contacts for the MOS gate, and for the cathode and gate regions of the PNPN structure; the anode contact is intrinsic. A fixed voltage is typically applied to an external node. The MOS gate structure allows current to be conducted between the external node and the intrinsic anode when on, and the PNPN structure conducts the current from the anode to the cathode when an appropriate voltage is applied to the gate contact. Regenerative feedback keeps the switch on once it begins to conduct. The MOS gate inhibits the flow of current between the external node and anode—and thereby turns off the switch—when off. When on, the MOS gate's channel resistance serves as a ballast resistor.
    Type: Grant
    Filed: March 27, 2008
    Date of Patent: August 27, 2013
    Assignee: Analog Devices, Inc.
    Inventors: Jeffrey G. Barrow, Javier A. Salcedo, A. Paul Brokaw
  • Patent number: 8513935
    Abstract: A single replica current is proportional to current through a main switch of a switching power converter. This replica current may be used for current compensation, detection and response to an overload, detection and response to a super-overload, and combinations thereof. An input voltage is switchably coupled to an output signal generating a load current responsive to a switch control. A replica switch generates a replica current proportional to the load current. A ramp modulation signal may be generated. A voltage ramp of the ramp modulation signal may be adjusted in response to the replica current. A feedback difference signal is compared to the ramp modulation signal to generate a comparison output. Comparison of an overload reference voltage to a replica voltage proportional to the replica current generates an overload signal. The switch control is generated responsive to the comparison output and may be modified responsive to the overload signal.
    Type: Grant
    Filed: December 16, 2010
    Date of Patent: August 20, 2013
    Assignee: Integrated Device Technology, Inc.
    Inventor: A. Paul Brokaw
  • Patent number: 8427130
    Abstract: Soft start circuits for a switching power converter include an amplifier configured to operate from a common bias node and amplify a difference between a positive input and a negative input to generate an amplifier output. A soft start bias circuit supplies a soft start bias current during a soft start process for the switching power converter. An operational bias circuit supplies an operational bias current after the soft start process. In some embodiments, a capacitor is operably coupled to the amplifier output and is configured to provide a frequency compensation for the switching power converter and a charging ramp for the soft start process. In some embodiments, the soft start circuit is configured such that the soft start bias current is at least an order of magnitude smaller than the operational bias current and limits a current that the amplifier can during the soft start process.
    Type: Grant
    Filed: December 16, 2010
    Date of Patent: April 23, 2013
    Assignee: Integrated Device Technology, Inc.
    Inventor: A. Paul Brokaw
  • Patent number: 8269478
    Abstract: A voltage regulator comprises first and second bipolar transistors operating at different current densities; a resistor is connected between their bases across which ?VBE appears. A third bipolar transistor is connected such that the voltages at the bases of the first and third transistors are equal or differ by a PTAT amount. A current mirror is arranged to balance the collector current of one of the second and third transistors with an image of the collector current of the first transistor when the output node is at a unique operating point. The operating point includes both PTAT and CTAT components, the ratio of which can be established such that the operating point has a desired temperature characteristic. A transistor connected to the output node and driven by the output of the current mirror regulates the output voltage by negative feedback.
    Type: Grant
    Filed: June 10, 2008
    Date of Patent: September 18, 2012
    Assignee: Analog Devices, Inc.
    Inventors: Hio Leong Chao, A. Paul Brokaw
  • Publication number: 20120223647
    Abstract: Energy sharing circuits and related methods are disclosed herein. A high voltage can be selectively coupled to a first source line and a low voltage can be selectively coupled to a second source line during a first time period. During a subsequent time period, a first coupling switch is activated to inductively couple the first source line to the second source line and diode block the second source line from the first source line. During a subsequent time period, the low voltage is selectively coupled to the first source line and the high voltage is selectively coupled to the second source line. During a subsequent time period, a second coupling switch is activated to inductively couple the second source line to the first source line and diode block the first source line from the second source line.
    Type: Application
    Filed: March 3, 2011
    Publication date: September 6, 2012
    Applicant: Integrated Device Technology, Inc.
    Inventors: A. Paul Brokaw, June Her, Jeffrey G. Barrow
  • Publication number: 20120153921
    Abstract: A single replica current is proportional to current through a main switch of a switching power converter. This replica current may be used for current compensation, detection and response to an overload, detection and response to a super-overload, and combinations thereof. An input voltage is switchably coupled to an output signal generating a load current responsive to a switch control. A replica switch generates a replica current proportional to the load current. A ramp modulation signal may be generated. A voltage ramp of the ramp modulation signal may be adjusted in response to the replica current. A feedback difference signal is compared to the ramp modulation signal to generate a comparison output. Comparison of an overload reference voltage to a replica voltage proportional to the replica current generates an overload signal. The switch control is generated responsive to the comparison output and may be modified responsive to the overload signal.
    Type: Application
    Filed: December 16, 2010
    Publication date: June 21, 2012
    Inventor: A. Paul Brokaw
  • Publication number: 20120155127
    Abstract: Soft start circuits for a switching power converter include an amplifier configured to operate from a common bias node and amplify a difference between a positive input and a negative input to generate an amplifier output. A soft start bias circuit supplies a soft start bias current during a soft start process for the switching power converter. An operational bias circuit supplies an operational bias current after the soft start process. In some embodiments, a capacitor is operably coupled to the amplifier output and is configured to provide a frequency compensation for the switching power converter and a charging ramp for the soft start process. In some embodiments, the soft start circuit is configured such that the soft start bias current is at least an order of magnitude smaller than the operational bias current and limits a current that the amplifier can during the soft start process.
    Type: Application
    Filed: December 16, 2010
    Publication date: June 21, 2012
    Inventor: A. Paul Brokaw
  • Publication number: 20120133634
    Abstract: An amplifier, electronic display system, and a related method for generating a low power signal with an operational amplifier are disclosed herein. An embodiment of the present invention includes an amplifier, comprising an operational amplifier and a voltage converter. The operational amplifier includes an inverting input, a non-inverting input, an output, a first power supply input and a second power supply input, and is configured to generate an output signal in response to an input signal. The voltage is operably coupled with the first power supply input of the operating amplifier, and is configured to receive a first supply voltage and generate a second supply voltage to the first power supply input of the operational amplifier. The voltage of the second supply voltage is relatively closer to the expected operating voltage range of the output signal than is the first supply voltage.
    Type: Application
    Filed: November 30, 2010
    Publication date: May 31, 2012
    Applicant: INTEGRATED DEVICE TECHNOLOGY, INC.
    Inventors: June Her, Andrew Luchsinger, Marc Kobayashi, Paul Brokaw
  • Patent number: 8159206
    Abstract: A voltage regulator comprises first and second bipolar transistors operating at different current densities; a resistance is connected between their bases across which ?VBE appears. A third bipolar transistor is connected such that its base voltage is equal to that of the first transistor or differs by a PTAT amount. A current mirror balances the collector current of one of the second and third transistors with an image of the collector current of the first transistor when an output node is at a unique operating point. The operating point includes both PTAT and CTAT components, the ratio of which can be established to provide a desired temperature characteristic. A feedback transistor provides current to the bases of the bipolar transistors and to the output node and is driven by the current mirror output to regulate the voltage at the output node by negative feedback.
    Type: Grant
    Filed: November 24, 2008
    Date of Patent: April 17, 2012
    Assignee: Analog Devices, Inc.
    Inventors: Hio Leong Chao, A. Paul Brokaw
  • Patent number: 7847634
    Abstract: Error amplifier structures are provided to generate an error signal in response to the difference between an input signal (e.g., a feedback current) and a reference signal (e.g., a bias current). Amplifier embodiments generally include a reference generator and a differencing amplifier. In at least one embodiment, the error generator is arranged to generate first and second bias voltages that correspond to the bias current. In at least one embodiment, the differencing amplifier is configured to provide a reference current to an output node in response to the first bias voltage, provide a feedback current to the output node in response to the second bias voltage, and generate an error current in response to a voltage at the output node. The error amplifier structures are suited for use in various systems such as negative switching regulators.
    Type: Grant
    Filed: January 22, 2009
    Date of Patent: December 7, 2010
    Assignee: Analog Devices, Inc.
    Inventors: Jeffrey G. Barrow, A. Paul Brokaw
  • Publication number: 20100182085
    Abstract: Error amplifier structures are provided to generate an error signal in response to the difference between an input signal (e.g., a feedback current) and a reference signal (e.g., a bias current). Amplifier embodiments generally include a reference generator and a differencing amplifier. In at least one embodiment, the error generator is arranged to generate first and second bias voltages that correspond to the bias current. In at least one embodiment, the differencing amplifier is configured to provide a reference current to an output node in response to the first bias voltage, provide a feedback current to the output node in response to the second bias voltage, and generate an error current in response to a voltage at the output node. The error amplifier structures are suited for use in various systems such as negative switching regulators.
    Type: Application
    Filed: January 22, 2009
    Publication date: July 22, 2010
    Inventors: Jeffrey G. Barrow, A. Paul Brokaw
  • Patent number: 7733030
    Abstract: A switching power converter with a controlled startup mechanism includes a switching stage which provides a voltage Vout at an output node in response to a switching control signal, with the output node adapted for connection to a non-linear load. A feedback network compares a signal which varies with the current conducted by the load (Iload) with a reference signal, and provides the switching control signal so as to maintain Iload at a desired value. A capacitor connected to the output node provides a current Ic to the feedback network which varies with dVout/dt. The feedback network is arranged to limit dVout/dt in response to current Ic when Iload is substantially zero. In this way, large inrush currents or damage that might otherwise occur during startup are avoided.
    Type: Grant
    Filed: December 26, 2007
    Date of Patent: June 8, 2010
    Assignee: Analog Devices, Inc.
    Inventors: A. Paul Brokaw, Trey Roessig
  • Patent number: 7646243
    Abstract: A differential stage which uses a bias generator circuit to set the operating currents of the input stage FETs to make the incremental Gm primarily a function of a single resistor embedded in the biasing circuit, such that the input stage has a Gm which only gradually departs from nominal under overdrive, and continues to supply output currents which increase with an increasing differential input signal.
    Type: Grant
    Filed: July 23, 2008
    Date of Patent: January 12, 2010
    Assignee: Analog Devices, Inc.
    Inventor: A. Paul Brokaw
  • Publication number: 20090302822
    Abstract: A voltage regulator comprises first and second bipolar transistors operating at different current densities; a resistor is connected between their bases across which ?VBE appears. A third bipolar transistor is connected such that the voltages at the bases of the first and third transistors are equal or differ by a PTAT amount. A current mirror is arranged to balance the collector current of one of the second and third transistors with an image of the collector current of the first transistor when the output node is at a unique operating point. The operating point includes both PTAT and CTAT components, the ratio of which can be established such that the operating point has a desired temperature characteristic. A transistor connected to the output node and driven by the output of the current mirror regulates the output voltage by negative feedback.
    Type: Application
    Filed: June 10, 2008
    Publication date: December 10, 2009
    Inventors: Hio Leong Chao, A. Paul Brokaw