Patents by Inventor A. Shay

A. Shay has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250145752
    Abstract: The invention relates to a composition comprising an unsaturated polyester dissolved in a monomer solution together with trinol (meth) acrylate, wherein the composition is essentially free of tribromoneopentyl alcohol (TBNPA) of the formula: A trinol (meth) acrylate-crosslinked polyester obtained by curing the solution, and a process for preparing an essentially TB-NPA-free trinol (meth) acrylate, are also provided by the invention.
    Type: Application
    Filed: March 5, 2023
    Publication date: May 8, 2025
    Inventors: Shay DICHTER, Joseph ZILBERMAN, Dov BERUBEN, Eyal EDEN, Marc LEIFER
  • Publication number: 20250150112
    Abstract: Aspects described herein relate to receiving an indication to measure a gain adapt reference signal, measuring, based at least in part on the indication, a signal metric of the gain adapt reference signal received from a network node, and applying, based at least in part on the signal metric of the gain adapt reference signal, an upfade for receiving a downlink signal from the network node. Other aspects relate to transmitting the indication and/or the gain adapt reference signal.
    Type: Application
    Filed: March 20, 2023
    Publication date: May 8, 2025
    Inventors: Shay LANDIS, Idan Michael HORN, Yehonatan DALLAL
  • Publication number: 20250147894
    Abstract: Splitting an address translation cache (ATC) into two portions can reduce costs and maintain efficient retrieval of data. One portion can be disposed in a first location while a second portion can be disposed in a second location distinct from the first location. The first location can be in the controller. The second location can be in a host memory buffer (HMB) or in a memory device separate from the controller. To obtain translated addresses, untranslated addresses can be searched in the first portion and the corresponding translated addresses can be retrieved from the second portion. When invalidating untranslated addresses, the untranslated addresses of the first portion can be deleted without a need to delete corresponding translated addresses in the second portion. To improve ATC storage capacity, grouping of untranslated addresses is possible using most significant bytes (MSBs).
    Type: Application
    Filed: November 7, 2023
    Publication date: May 8, 2025
    Applicant: Western Digital Technologies, Inc.
    Inventors: Shay BENISTY, Ariel NAVON, Judah Gamliel HAHN, Alexander BAZARSKY
  • Publication number: 20250147898
    Abstract: Reducing extra traffic on the PCIe bus by initiating speculative address translation requests and aggregating them with normal address translation request can lead to significantly improved data retrieval performance. This can be achieved by issuing speculative address translation requests based on history or structure of host buffer pointers previously issued by each tenant. If the device controller determines that there is a high-hit rate probability, the controller will coalesce the speculative requests with the normal address translation request. The coalescing may be accomplished by dynamically changing the length field in the address translation request. The controller may also collect statistics of the speculative address translation requests per tenant. If the controller determines that the performance gain for a specific tenant's workload becomes minimal, the speculative request feature is disabled.
    Type: Application
    Filed: November 6, 2023
    Publication date: May 8, 2025
    Applicant: Western Digital Technologies, Inc.
    Inventor: Shay BENISTY
  • Publication number: 20250143820
    Abstract: The presently disclosed subject matter aims to a system and method including a processing circuitry configured to: obtain: (a) a current input control configuration of at least one input control of one or more input controls, and (b) a current mechanical arm configuration of at least one mechanical arm of one or more mechanical arms; identify a misalignment between at least one input control of the one or more input controls and its respective at least one mechanical arm of the one or more mechanical arms by comparing the current input control configuration and the current mechanical arm configuration of the at least one input control of the one or more input controls and its respective at least one mechanical arm of the one or more mechanical arms; and, upon identification of the misalignment, perform an action.
    Type: Application
    Filed: February 16, 2023
    Publication date: May 8, 2025
    Inventors: Ben HAZAN, Efrat MILMAN, Inbal REGEV, Shay KATZ, Ofer FISHMAN
  • Publication number: 20250151342
    Abstract: Embodiments of present invention provide a semiconductor structure. The structure includes a first group of field-effect-transistors (FETs); a second group of FETs on top of the first group of FETs; a first half-single-diffusion-break (H-SDB) underneath and being separated from one of the FETs of the second group by a middle-dielectric-insulator (MDI) layer; and a second H-SDB on top of and being separated from one of the FETs of the first group by the MDI layer, where the first H-SDB insulates a source/drain (S/D) region of a first FET of the first group of FETs from a S/D region of a second FET of the first group of FETs, and the second H-SDB insulates a S/D region of a first FET of the second group of FETs from a S/D region of a second FET of the second group of FETs. A method of forming the same is also provided.
    Type: Application
    Filed: November 6, 2023
    Publication date: May 8, 2025
    Inventors: Chen Zhang, Ruilong Xie, Shay Reboh, Junli Wang
  • Publication number: 20250150309
    Abstract: Methods, systems, and devices for wireless communications are described. Techniques described herein provide for a user equipment (UE) to determine a channel estimation associated with a downlink channel. In some examples, a network entity may determine a projection matrix and may transmit, to the UE, control signaling indicating the projection matrix. The UE may determine the channel estimation associated with the downlink channel based on the projection matrix. The UE may receive data signaling from the network entity, and the UE may demodulate the data signaling according to the channel estimation that is based at least in part on the projection matrix.
    Type: Application
    Filed: November 2, 2023
    Publication date: May 8, 2025
    Inventors: Aviv REGEV, Amit BAR-OR TILLINGER, Shay LANDIS, Yaniv EISTEIN, Ronen SHAKED
  • Publication number: 20250147909
    Abstract: Instead of an arbitration over the link not considering bursts, a smart scheduler in a solid state drive (SSD) host interface is burst aware. The scheduler considers the type of transactions that are going to be sent over the interface. The scheduler sends the transactions in the most efficient way while maximizing the efficiency over the host DRAM. The schedulers may be calibrated from time to time on-the-fly to find the optimal configurations adapted to the current workload. The scheduler will organize the packets selected by the arbitration module so that the data transfers are sent in a burst of a predetermined sized to the host for optimum performance. For further optimization other packet types are sent in bursts as well.
    Type: Application
    Filed: November 6, 2023
    Publication date: May 8, 2025
    Applicant: Western Digital Technologies, Inc.
    Inventors: Shay BENISTY, Amir SEGEV
  • Patent number: 12292499
    Abstract: Radar systems and methods for imaging surfaces. A processor receives raw data from the radar and executes an image data generation. A display unit displays an image representing the targeted surface. The radar unit may be incorporated in a handheld scanner. Rectangular antenna arrays may be configured and processors may be operable such that the image data generated may be processed and displayed in real time.
    Type: Grant
    Filed: August 17, 2023
    Date of Patent: May 6, 2025
    Inventors: Tanya Chernyakova, Omer Gal, Assaf Kartowsky, Shay Moshe
  • Publication number: 20250136373
    Abstract: A method for turning a pinion-driven lift-robot in an intersection of rails. Moving the pinion-driven lift-robot in a first motion mode to position the pinion-driven lift-robot in a first position at the intersection. The pinion-driven lift-robot is turned over a corner of the intersection that is accessible from the first position and that includes continuous rails connecting a vertical track and a horizontal track, whereby positioning the pinion-driven lift-robot in a second position at the intersection. The pinion-driven lift-robot is moved in a second motion mode towards a designated direction.
    Type: Application
    Filed: January 3, 2025
    Publication date: May 1, 2025
    Inventors: Shay Cohen, Guy Blotnik, Nadav Laor
  • Publication number: 20250141623
    Abstract: Certain aspects of the present disclosure provide techniques for channel aware demodulation reference signals (DMRS). An example method, performed at a user equipment (UE), generally includes receiving a message indicating one or more parameters for dynamic DMRS resource allocation, and communicating during one or more periods using DMRS resources dynamically allocated for the one or more periods based on the one or more parameters.
    Type: Application
    Filed: November 1, 2023
    Publication date: May 1, 2025
    Inventors: Jacob PICK, Shay LANDIS, Peer BERGER, Tomer GEVA
  • Publication number: 20250135075
    Abstract: Biocomposite materials which overcome the drawbacks of the background art. Medical implants are provided that incorporate novel structures, alignments, orientations and forms comprised of such surface treated bioabsorbable materials, such as for example implants featuring protrusions.
    Type: Application
    Filed: July 4, 2022
    Publication date: May 1, 2025
    Inventors: Orahn PREISS-BLOOM, Shay PARAG, Tal ZEEVI
  • Publication number: 20250139013
    Abstract: Redundancy bits can be used to more effectively manage address translation cache (ATC) in data storage devices. The data storage device maintains a table of redundancy bits. When a request for an address translation arrives, the redundancy bits are calculated and compared to redundancy bits in the table. If there is a match, then the relevant ATC entry is retrieved and compared to the untranslated addresses. The same process is repeated for each redundancy bits match until finding a match in the ATC. In so doing, the translated address can be requested much earlier than normal by requesting the translated address upon the redundancy bits not matching. The earlier retrieval reduces throughput of the memory device without reducing performance. Furthermore, the unique structure of the internal ATC allows most of the ATC to be located in SRAM/DRAM while simply the redundancy bits are stored in flops.
    Type: Application
    Filed: November 1, 2023
    Publication date: May 1, 2025
    Applicant: Western Digital Technologies, Inc.
    Inventor: Shay BENISTY
  • Patent number: 12285542
    Abstract: In one embodiment, the present invention provides a composition, wherein the composition is a porous scaffold, wherein the pores of the scaffold are from 1 to 500 microns, the composition comprising: a) a cross-linkable protein selected from the group consisting of collagen and gelatin; b) a cross-linker which induces cross-linking of the cross-linkable protein; and c) a liquid.
    Type: Grant
    Filed: October 17, 2023
    Date of Patent: April 29, 2025
    Assignee: BIO-CHANGE LTD.
    Inventors: Ishay Attar, Shay Yaacov Sherbo Zheli
  • Patent number: 12287690
    Abstract: Methods and apparatus for power management in data storage devices are provided. One such data storage device (DSD) includes a non-volatile memory (NVM), a set of hardware processing engines, and a power sensor to detect a total power consumption of the set of hardware processing engines. A processor is configured to determine a power-per-processing event value for each of the set of processing engines based on total power consumption measurements, then control delivery of power to the processing engines based on the power-per-processing event values in accordance with a power budget. In some examples, the DSD employs a least-squares procedure to estimate the power-per-processing event values so the values can be determined without needing to measure the individual power consumption of the processing engines. Exemplary processing engines include a Read engine, a Write engine, etc. A recursive least-squares update procedure is also described.
    Type: Grant
    Filed: October 3, 2022
    Date of Patent: April 29, 2025
    Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
    Inventors: Yoseph Hassan, Eran Sharon, Shay Benisty, Ariel Navon
  • Patent number: 12289163
    Abstract: Various aspects of the present disclosure generally relate to wireless communication. In some aspects, a user equipment (UE) may receive a reference signal for estimation of at least one parameter associated with generation of an adapted low density parity check (LDPC) graph. The UE may transmit an indication of an adapted LDPC graph that is based on at least one adaptation metric associated with the at least one parameter. The UE may receive, based on the adapted LDPC graph, a downlink shared channel communication. Numerous other aspects are described.
    Type: Grant
    Filed: December 27, 2022
    Date of Patent: April 29, 2025
    Assignee: QUALCOMM Incorporated
    Inventors: Amit Bar-Or Tillinger, Shay Landis, Idan Michael Horn, Yehonatan Dallal
  • Publication number: 20250133001
    Abstract: Instead of maximizing the possible bandwidth of device, utilize time slice credits (TSC), to ensure bandwidth average over a sliding window. When the average is ensured over a sliding window, the device should not care when the host decides to sample a 100 mSec for example, as the average will always be correct. By utilizing set percentage of predetermined allotment for the average bandwidth requirement, the system can give out credit on a predetermined interval. The credit is given out based on usage and once credit is depleted, data cannot be sent until more credit is accumulated. When data is not sent, the system is given a chance to accumulate credit to increase the amount of data sent. Once credit is at a level high enough to send data the device will send the data, but not at a speed that will surpass the average bandwidth requirement.
    Type: Application
    Filed: October 18, 2023
    Publication date: April 24, 2025
    Applicant: Western Digital Technologies, Inc.
    Inventors: Amir SEGEV, Shay BENISTY
  • Publication number: 20250132954
    Abstract: Certain aspects of the present disclosure provide techniques for machine learning (ML) based control channel (CCH) resource selection. An example method, performed at a user equipment (UE), generally includes receiving, from a network entity, signaling indicating parameters for configuring a machine learning (ML) model, applying the parameters to configure the ML model, performing channel estimation based on at least one reference signal (RS) measurement, using the ML model to select control channel (CCH) resources to monitor, based on the channel estimation, and monitoring the selected CCH resources for a CCH transmission from the network entity.
    Type: Application
    Filed: October 19, 2023
    Publication date: April 24, 2025
    Inventors: Ran BERLINER, Shay LANDIS, Eitan YERUSHALMI, Yevgeny ZAGALSKY
  • Publication number: 20250133538
    Abstract: Methods, systems, and devices for wireless communication are described. A user equipment (UE) may receive a configuration signal indicating that tone reservation is activated on a first set of resource elements of a downlink transmission for out of band transmission reduction, where a second set of resource elements of the downlink transmission is reserved for data transmission. The UE may then receive, from a network entity, the downlink transmission including the first set of resource elements and the second set of resource elements. After receiving the downlink transmission, the UE may decode the downlink transmission in accordance with the configuration signal.
    Type: Application
    Filed: October 18, 2023
    Publication date: April 24, 2025
    Inventors: Shay LANDIS, Amit BAR-OR TILLINGER, Idan Michael HORN, Yehonatan DALLAL, Gideon Shlomo KUTZ
  • Publication number: 20250132980
    Abstract: A system and method for securing a computing environment using graphing of computing interfaces. A method includes traversing a network configuration graph with respect to a first component deployed in a computing environment. Traversing the network configuration graph results in a connections between components in the computing environment represented by nodes including at least one connection to a first node representing the first component. The nodes include at least one computing interface node and at least one other node. Each computing interface node represents a computing interface of computing interfaces deployed in the computing environment. The method also includes determining, based on the connections, a configuration of the first component with respect to service or consumption of at least one of the computing interfaces. The method also includes detecting a misconfiguration of the first component based on the determined configuration of the first component.
    Type: Application
    Filed: October 1, 2024
    Publication date: April 24, 2025
    Inventors: Dor Dankner, Tomer Semo, Aner Morag, Shay Levi, Oz Golan, Oren Shpigel, Hila Zigman