Abstract: A method is provided that provides data analysis for sequence of events reporting in the operation of an industrial process. A digital filter and edge detector are provided that combines a method for excluding known invalid samples and a method for excluding samples taken while the input in the traveling range. The filtering method reduces the overhead on the CPU from managing the sequence of events machine and allows it to focus on performing safety functions.

Abstract: A safety instrumented system (SIS) includes safety controllers, and safety input/output (I/O) modules coupled to safety field devices that are coupled in parallel with a process control system's field devices to processing equipment which is configured and controlled to run a process. An I/O mesh network between the safety controllers and the safety I/O modules is configured for selecting any safety controller to become coupled to any safety I/O module to function as a pool of safety I/O modules so that any safety controller is configurable to receive sensor signals from and transmit control signals to any safety field device. The safety field devices are for monitoring process variable(s) for the process so that when one of the safety controllers recognizes a hazardous condition regarding the processing equipment, the SIS independently takes action to keep the processing equipment under control or bring it to a safe state.

Abstract: A safety instrumented system (SIS) includes safety controllers, and safety input/output (I/O) modules coupled to safety field devices that are coupled in parallel with a process control system's field devices to processing equipment which is configured and controlled to run a process. An I/O mesh network between the safety controllers and the safety I/O modules is configured for selecting any safety controller to become coupled to any safety I/O module to function as a pool of safety I/O modules so that any safety controller is configurable to receive sensor signals from and transmit control signals to any safety field device. The safety field devices are for monitoring process variable(s) for the process so that when one of the safety controllers recognizes a hazardous condition regarding the processing equipment, the SIS independently takes action to keep the processing equipment under control or bring it to a safe state.

Abstract: A method is provided that provides data analysis for sequence of events reporting in the operation of an industrial process. A digital filter and edge detector are provided that combines a method for excluding known invalid samples and a method for excluding samples taken while the input in the traveling range. The filtering method reduces the overhead on the CPU from managing the sequence of events machine and allows it to focus on performing safety functions.

Abstract: A fault-tolerant process control system includes a first and second master process controller, each including a first and second serial communication engine. A first bus switch couples the first serial communication engine to a shared SPI bus and a second bus switch couples the second communication engine to shared SPI bus. The shared SPI bus transmits SPI signals received from the first serial communication engine when the first bus switch is enabled to a first target device, and transmits SPI signals received from the second serial communication engine when the second bus switch is enabled to a second target device. An arbiter block receives a select control signal from the master process controllers and is coupled to both the first and second bus switch for single bus switch selection so that only one master process controller is granted access to the shared SPI bus.

Abstract: A method of ensuring a correct program sequence in a dual-Processor module that includes Processor A and Processor B. Processor A and Processor B are both coupled to a common memory. Processor A and Processor B each execute a first safety program and each generate an instruction stream therefrom. At one or more points in time while running the first safety program, Processor A reads its program counter value from a current instruction being executed and generates therefrom a current Processor A CRC value, and Processor B reading its program counter value from the same current instruction being executed generates therefrom a current Processor B CRC value. Processor A transfers its current CRC value to Processor B and/or Processor B transfers its current CRC value to Processor A, and these CRC values are compared. A safety action is triggered if the comparing determines non-matching current CRC values.

Abstract: A method of ensuring a correct program sequence in a dual-Processor module that includes Processor A and Processor B. Processor A and Processor B are both coupled to a common memory. Processor A and Processor B each execute a first safety program and each generate an instruction stream therefrom. At one or more points in time while running the first safety program, Processor A reads its program counter value from a current instruction being executed and generates therefrom a current Processor A CRC value, and Processor B reading its program counter value from the same current instruction being executed generates therefrom a current Processor B CRC value. Processor A transfers its current CRC value to Processor B and/or Processor B transfers its current CRC value to Processor A, and these CRC values are compared. A safety action is triggered if the comparing determines non-matching current CRC values.

Abstract: A fault-tolerant process control system includes a first and second master process controller, each including a first and second serial communication engine. A first bus switch couples the first serial communication engine to a shared SPI bus and a second bus switch couples the second communication engine to shared SPI bus. The shared SPI bus transmits SPI signals received from the first serial communication engine when the first bus switch is enabled to a first target device, and transmits SPI signals received from the second serial communication engine when the second bus switch is enabled to a second target device. An arbiter block receives a select control signal from the master process controllers and is coupled to both the first and second bus switch for single bus switch selection so that only one master process controller is granted access to the shared SPI bus.

Abstract: A safety controller includes an interface circuit coupled to IO devices coupled to field devices coupled to processing equipment, a primary controller including a primary processor and a secondary controller including a secondary processor each for implementing control loops that automatically take actions by sending control signals to the actuators, and a bus coupling the interface circuit and a mode-switching multi-key switch. The multi-key switch includes a force (FRC) enable key-switch having a FRC enable On position for entering a maintenance override mode and an OFF position, and a FRC reset key-switch having a FRC reset position for removal of maintenance overrides. Following entry of a first maintenance override and the FRC enable key-switch is then returned to the OFF position, there are no changes to the first maintenance override while new maintenance overrides cannot be added until the FRC enable key-switch is set to the FRC On position again.

Abstract: A fault-tolerant industrial control system includes a redundant controller including a first process controller (CP1) including a first processor with a first associated memory, and a parallel connected second redundant process controller (CP2) including a second processor with a second associated memory. A redundancy link is between CP1 and CP2 for sharing data. CP1 and CP2 include logic gates exclusive of any conditional branching for performing data synchronization and calculations including a different logical arrangement for providing each of a digital output (DO), a digital input (DI), an analog input (AI), and an analog output (AO). At least one input/output (IO) module includes a first IO processor including a first memory coupled by a first leg to CP1 and by a second leg to CP2. The IO module is coupled to field devices that are coupled to processing equipment.