Patents by Inventor AAJNA KARKI
AAJNA KARKI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12204756Abstract: Aspects of a storage device are provided that requests L2P address translation data from an HMB for execution of an associated host command using a dynamically determined HMB transfer size. The storage device includes a volatile memory and a controller. The controller allocates, in the volatile memory, multiple memory locations for L2P address translation data from an HMB. The controller receives a command indicating a host data length, and transmits a request for a portion of the L2P address translation data stored in the HMB for the command. The HMB transfer size associated with the request may be based on the host data length of the associated host command, a quantity of free and contiguous memory locations available in the HMB read buffer, or a minimum between a size of the portion and a total size of the free and contiguous memory locations. Thus, HMB transfer latency may be reduced.Type: GrantFiled: September 12, 2022Date of Patent: January 21, 2025Assignee: SANDISK TECHNOLOGIES, INC.Inventors: Dhanunjaya Rao Gorrle, Aajna Karki, Hongmei Xie
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Patent number: 12026384Abstract: Aspects of a storage device including a memory and a controller are provided. In certain aspects, the controller may determine that data stored on a first block satisfies a threshold data-error condition, the data comprising invalid data and valid data. For example, the first block may have a high ratio of valid data to invalid data that satisfies or exceeds a threshold value. In certain aspects, the controller may determine a close block boundary associated with the first block, wherein the close block boundary is configured to bifurcate the first block into a first portion and a second portion, wherein the first portion comprises the data. For example, the controller may determine a boundary defined by a data length, an indirection mapping unit, a physical program boundary, etc.Type: GrantFiled: August 26, 2022Date of Patent: July 2, 2024Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.Inventors: Ji-Hyun In, Yosief Ataklti, Aajna Karki, Hongmei Xie, Xiaoying Li
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Publication number: 20240086071Abstract: Aspects of a storage device are provided that requests L2P address translation data from an HMB for execution of an associated host command using a dynamically determined HMB transfer size. The storage device includes a volatile memory and a controller. The controller allocates, in the volatile memory, multiple memory locations for L2P address translation data from an HMB. The controller receives a command indicating a host data length, and transmits a request for a portion of the L2P address translation data stored in the HMB for the command. The HMB transfer size associated with the request may be based on the host data length of the associated host command, a quantity of free and contiguous memory locations available in the HMB read buffer, or a minimum between a size of the portion and a total size of the free and contiguous memory locations. Thus, HMB transfer latency may be reduced.Type: ApplicationFiled: September 12, 2022Publication date: March 14, 2024Inventors: Dhanunjaya Rao GORRLE, Aajna KARKI, Hongmei XIE
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Publication number: 20240069773Abstract: Aspects of a storage device including a memory and a controller are provided. In certain aspects, the controller may determine that data stored on a first block satisfies a threshold data-error condition, the data comprising invalid data and valid data. For example, the first block may have a high ratio of valid data to invalid data that satisfies or exceeds a threshold value. In certain aspects, the controller may determine a close block boundary associated with the first block, wherein the close block boundary is configured to bifurcate the first block into a first portion and a second portion, wherein the first portion comprises the data. For example, the controller may determine a boundary defined by a data length, an indirection mapping unit, a physical program boundary, etc.Type: ApplicationFiled: August 26, 2022Publication date: February 29, 2024Inventors: Ji-Hyun IN, Yosief ATAKLTI, Aajna KARKI, Hongmei XIE, Xiaoying LI
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Patent number: 11663136Abstract: A non-volatile memory device includes a volatile memory, a non-volatile memory, and a controller. The controller is configured to map logical addresses for stored data to physical addresses of the stored data in the non-volatile memory using a logical-to-physical mapping structure stored partially in the volatile memory and at least partially in the non-volatile memory. The controller is configured to perform a storage capacity recovery operation for a region of the non-volatile memory that is selected based at least partially on a number of mappings for the region likely to be stored in the volatile memory for the storage capacity recovery operation.Type: GrantFiled: June 24, 2020Date of Patent: May 30, 2023Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.Inventors: Hongmei Xie, Dhanunjaya Rao Gorrle, Aajna Karki
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Patent number: 11640260Abstract: A data storage device includes a memory device and a controller coupled to the memory device. The data storage device supports zoned namespace. The controller is configured to maintain a zone timestamp table that includes a corresponding timestamp for each zone and add a timestamp to each garbage collection block of the memory device. The controller is further configured to scan a garbage collection block from a last physical block address (PBA) entry to a first PBA entry, determine a zone timestamp for the scanned PBA entry, and compare the zone timestamp to a timestamp of the garbage collection block. The controller is further configured to create and maintain a zone timestamp table and create and maintain a zone based defragmentation table.Type: GrantFiled: July 21, 2022Date of Patent: May 2, 2023Assignee: Western Digital Technologies, Inc.Inventors: Hongmei Xie, Aajna Karki, Xiaoying Li, Ji-Hyun In, Dhanunjaya Rao Gorrle
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Patent number: 11543993Abstract: A data storage device includes a memory device and a controller coupled to the memory device. The data storage device supports zoned namespace. The controller is configured to maintain a zone timestamp table that includes a corresponding timestamp for each zone and add a timestamp to each garbage collection block of the memory device. The controller is further configured to scan a garbage collection block from a last physical block address (PBA) entry to a first PBA entry, determine a zone timestamp for the scanned PBA entry, and compare the zone timestamp to a timestamp of the garbage collection block. The controller is further configured to create and maintain a zone timestamp table and create and maintain a zone based defragmentation table.Type: GrantFiled: June 17, 2021Date of Patent: January 3, 2023Assignee: Western Digital Technologies, Inc.Inventors: Hongmei Xie, Aajna Karki, Xiaoying Li, Ji-Hyun In, Dhanunjaya Rao Gorrle
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Publication number: 20220405001Abstract: A data storage device includes a memory device and a controller coupled to the memory device. The data storage device supports zoned namespace. The controller is configured to maintain a zone timestamp table that includes a corresponding timestamp for each zone and add a timestamp to each garbage collection block of the memory device. The controller is further configured to scan a garbage collection block from a last physical block address (PBA) entry to a first PBA entry, determine a zone timestamp for the scanned PBA entry, and compare the zone timestamp to a timestamp of the garbage collection block. The controller is further configured to create and maintain a zone timestamp table and create and maintain a zone based defragmentation table.Type: ApplicationFiled: July 21, 2022Publication date: December 22, 2022Applicant: Western Digital Technologies, Inc.Inventors: Hongmei XIE, Aajna KARKI, Xiaoying LI, Ji-Hyun IN, Dhanunjaya Rao GORRLE
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Publication number: 20220404996Abstract: A data storage device includes a memory device and a controller coupled to the memory device. The data storage device supports zoned namespace. The controller is configured to maintain a zone timestamp table that includes a corresponding timestamp for each zone and add a timestamp to each garbage collection block of the memory device. The controller is further configured to scan a garbage collection block from a last physical block address (PBA) entry to a first PBA entry, determine a zone timestamp for the scanned PBA entry, and compare the zone timestamp to a timestamp of the garbage collection block. The controller is further configured to create and maintain a zone timestamp table and create and maintain a zone based defragmentation table.Type: ApplicationFiled: June 17, 2021Publication date: December 22, 2022Inventors: Hongmei XIE, Aajna KARKI, Xiaoying LI, Ji-Hyun IN, Dhanunjaya Rao GORRLE
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Publication number: 20210406192Abstract: A non-volatile memory device includes a volatile memory, a non-volatile memory, and a controller. The controller is configured to map logical addresses for stored data to physical addresses of the stored data in the non-volatile memory using a logical-to-physical mapping structure stored partially in the volatile memory and at least partially in the non-volatile memory. The controller is configured to perform a storage capacity recovery operation for a region of the non-volatile memory that is selected based at least partially on a number of mappings for the region likely to be stored in the volatile memory for the storage capacity recovery operation.Type: ApplicationFiled: June 24, 2020Publication date: December 30, 2021Applicant: Western Digital Technologies, Inc.Inventors: HONGMEI XIE, DHANUNJAYA RAO GORRLE, AAJNA KARKI