Abstract: Systems and methods are provide for automatically constructing data lineage representations for distributed data processing pipelines. These data lineage representations (which are constructed and stored in a central repository shared by the multiple data processing sites) can be used to among other things, clone the distributed data processing pipeline for quality assurance or debugging purposes. Examples of the presently disclosed technology are able to construct data lineage representations for distributed data processing pipelines by (1) generating a hash content value for universally identifying each data artifact of the distributed data processing pipeline across the multiple processing stages/processing sites of the distributed data processing pipeline; and (2) creating an data processing pipeline abstraction hierarchy for associating each data artifact to input and output events for given executions of given data processing stages (performed by the multiple data processing sites).

Abstract: Examples described herein relate to a security system consistent with the disclosure. For instance, the security system may comprise a sensor interface bridge connecting a gateway to an input/output (I/O) card, a Field Programmable Gate Array (FPGA) to scan data to detect an anomaly in the data while the data is in the sensor interface bridge, where a learning neural network accelerator Application-Specific Integrated Circuit (ASIC) is integrated with the FPGA and send the data without an anomaly to the gateway.

Abstract: Systems and methods are provided for enabling coexistence of Information Technology (IT) systems and Operational Technology (OT) systems, where advanced computing functionality realized by the IT systems can be applied to legacy applications and incumbent hardware technologies resident in the OT systems. A distributed control node (DCN) implemented between the IT and OT systems may comprise a microcontroller system partitioned into two processor clusters. Microservices associated with the IT systems are provisioned to a high performance processor cluster, and legacy applications running bare metal associated with the OT systems are provisioned to a real-time processor cluster. Partitioning of the microcontroller system allows for interoperability between the microservices and the legacy applications.

Abstract: Systems and methods are provided for integrating data acquisition and machine learning (ML) analytics capabilities in a transformative way. The system may implement a discovery phase, a machine learning phase, and an integration phase using hardware and software components. By incorporating these system components, the significant amounts of data may be acquired and analyzed in near real-time to enhance sensor communications with these OT networks and adjust operation of distributed IoT or edge devices.

Abstract: A universal industrial I/O interface bridge is provided. The universal industrial I/O interface bridge may be placed between a host and I/O interface cards to translate and manage electronic communications from these and other sources. Embodiments of the application may include (1) an improved hardware module, (2) an I/O discovery process to dynamically reprogram the universal industrial I/O interface bridge depending on the attached I/O card, (3) an abstraction process to illustrate the universal industrial I/O interface bridge and the physical I/O interfaces, (4) an alert plane within the universal industrial I/O interface bridge to respond to I/O alert pins, and (5) a secure distribution process for a firmware update of the universal industrial I/O interface bridge.

Abstract: Example implementations relate to performing converged address translation for devices in a local area network. An example non-transitory computer-readable storage medium stores instructions for performing converged network address translation for devices within a network segmented into multiple VLANs. The instructions when executed by a processing resource of a computing device cause the device to create a local namespace for each VLAN in the network, each local namespace having a list of first level IP addresses unique across all of the created local namespaces. The instructions further cause the processing resource to, for each local namespace, associate a first level IP address from the local namespace's list of first level IP addresses with a static IP address of each device within the respective VLAN and store the associated IP addresses in a routing table for the local namespace.

Abstract: Examples described herein relate to a security system consistent with the disclosure. For instance, the security system may comprise a sensor interface bridge connecting a gateway to an input/output (I/O) card, a Field Programmable Gate Array (FPGA) to scan data to detect an anomaly in the data while the data is in the sensor interface bridge, where a learning neural network accelerator Application-Specific Integrated Circuit (ASIC) is integrated with the FPGA and send the data without an anomaly to the gateway.

Abstract: Example implementations relate to performing converged address translation for devices in a local area network. An example non-transitory computer-readable storage medium stores instructions for performing converged network address translation for devices within a network segmented into multiple VLANs. The instructions when executed by a processing resource of a computing device cause the device to create a local namespace for each VLAN in the network, each local namespace having a list of first level IP addresses unique across all of the created local namespaces. The instructions further cause the processing resource to, for each local namespace, associate a first level IP address from the local namespace's list of first level IP addresses with a static IP address of each device within the respective VLAN and store the associated IP addresses in a routing table for the local namespace.