Patents by Inventor Aaron Charles Egier

Aaron Charles Egier has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Power reduction techniques for components in integrated circuits
    Patent number: 8015425
    Abstract: Optimizing the power used in an integrated circuit. A circuit-level transformation/permutation reduces the power consumed by multipliers or other components in integrated circuits. Signals that toggle frequently are assigned to lower power multiplier ports or the number of times a signal changes value is minimized. Large width signals are assigned to the low power port. Large multipliers are divided up and optimized as above. Pipelined multipliers are used with registers so that signals change together.
    Type: Grant
    Filed: August 5, 2009
    Date of Patent: September 6, 2011
    Assignee: Altera Corporation
    Inventors: Aaron Charles Egier, David Neto
  • Power reduction techniques for components in integrated circuits by assigning inputs to a plurality of ports based on power consumption ratings
    Patent number: 7587620
    Abstract: Optimizing the power used in an integrated circuit. A circuit-level transformation/permutation reduces the power consumed by multipliers or other components in integrated circuits. Signals that toggle frequently are assigned to lower power multiplier ports or the number of times a signal changes value is minimized. Large width signals are assigned to the low power port. Large multipliers are divided up and optimized as above. Pipelined multipliers are used with registers so that signals change together.
    Type: Grant
    Filed: May 9, 2006
    Date of Patent: September 8, 2009
    Assignee: Altera Corporation
    Inventors: Aaron Charles Egier, David Neto