Abstract: Designing a circuit to perform a floating point arithmetic operation by identifying a multiple of parameters that characterize circuits for performing the floating point arithmetic operation and an equation relating the plurality of parameters to a maximum relative backward error parameter, the circuits respectively corresponding to combinations of values for the parameters; specifying a target maximum relative backward error for the floating point arithmetic operation; computing a maximum relative backward error for each of one or more of the combinations of values based on the equation; and when the maximum relative backward error for a respective combination of values is less than the target maximum relative backward error, identifying the circuit corresponding to the maximum relative backward error as a circuit operable to perform the floating point arithmetic operation at a desirable output accuracy.

Abstract: A circuit for performing neural network computations for a neural network comprising a plurality of layers, the circuit comprising: activation circuitry configured to receive a vector of accumulated values and configured to apply a function to each accumulated value to generate a vector of activation values; and normalization circuitry coupled to the activation circuitry and configured to generate a respective normalized value from each activation value.

Abstract: Apparatus and methods for providing therapeutic treatment for symptoms associated with GERD and/or other digestive disorders and/or other medical conditions are described herein. In some embodiments, an apparatus includes a base support having a support element portion and an encasement portion. The support element portion has a first end portion, a second end portion and a top surface disposed at an angle relative to a bottom surface. The second end portion has a height greater than the first end portion. A support pillow member is fixedly coupled to the base support between at least a portion of the encasement portion and at least a portion the second end portion of the support element portion. The support pillow member, the support element portion and the encasement portion collectively define an interior region that includes a receiving portion configured to receive at least a portion of a user's arm therein.

Abstract: A circuit for transposing a matrix comprising reversal circuitry configured, for each of one or more diagonals of the matrix, to receive elements of the matrix in a first vector and generate a second vector that includes the elements of the matrix in an order that is a reverse of an order of the elements of the matrix in the first vector, and rotation circuitry configured, for each of the one or more diagonals of the matrix, to determine a number of positions by which to rotate the elements of the matrix in the second vector, receive the second vector of elements of the matrix, and generate a third vector that includes the elements of the matrix in the second vector in an order that is a rotation of the elements of the matrix in the second vector by the determined number of positions.

Abstract: Apparatus and methods for providing therapeutic treatment for symptoms associated with GERD and/or other digestive disorders and/or other medical conditions are described herein. In some embodiments, an apparatus includes a support element that has a first end portion and a second end portion and a top surface disposed at an angle relative to a bottom surface of the support element. The second end portion has a height greater than the first end portion. A riser element is configured to be coupled proximate to the second end portion of the support element. A body element is configured to be disposed on at least one of the support element or the riser element. The body element has a first arm and a second arm connected together by an arc portion.

Abstract: Apparatus and methods for providing therapeutic treatment for symptoms associated with GERD and/or other digestive disorders and/or other medical conditions are described herein. In some embodiments, an apparatus includes a base support having a support element portion and an encasement portion. The support element portion has a first end portion, a second end portion and a top surface disposed at an angle relative to a bottom surface. The second end portion has a height greater than the first end portion. A support pillow member is fixedly coupled to the base support between at least a portion of the encasement portion and at least a portion the second end portion of the support element portion. The support pillow member, the support element portion and the encasement portion collectively define an interior region that includes a receiving portion configured to receive at least a portion of a user's arm therein.

Abstract: In a system including vector registers storing right-hand side data and left-hand side data, first and second matrix staging registers, and a systolic array of processing cells for conducting matrix multiplication operations using the right-hand side data and left-hand side data, one or more processors load the right-hand side data from the vector registers to the first matrix staging register based on an instruction indicating whether to transpose the right-hand side data, load the left-hand side data from the vector registers into the second matrix staging register based on another instruction indicating whether to transpose the left-hand side data, load the right-hand side data from the first matrix staging register into the systolic array, and, in a cycle of the matrix multiplication operation, pass one or more columns of the left-hand side data from the second matrix staging register to a column of the systolic array.

Abstract: In a system including vector registers storing right-hand side data and left-hand side data, first and second matrix staging registers, and a systolic array of processing cells for conducting matrix multiplication operations using the right-hand side data and left-hand side data, one or more processors load the right-hand side data from the vector registers to the first matrix staging register based on an instruction indicating whether to transpose the right-hand side data, load the left-hand side data from the vector registers into the second matrix staging register based on another instruction indicating whether to transpose the left-hand side data, load the right-hand side data from the first matrix staging register into the systolic array, and, in a cycle of the matrix multiplication operation, pass one or more columns of the left-hand side data from the second matrix staging register to a column of the systolic array.

Abstract: A circuit for performing neural network computations for a neural network comprising a plurality of layers, the circuit comprising: activation circuitry configured to receive a vector of accumulated values and configured to apply a function to each accumulated value to generate a vector of activation values; and normalization circuitry coupled to the activation circuitry and configured to generate a respective normalized value from each activation value.

Abstract: A system and method for matrix multiplication using a systolic array configurable between multiple modes of operation. A systolic processor may receive a data type indicator for the matrix multiplication. For a first data type, the systolic processor may load the right-hand side data from the right-hand matrix register into the data processing cells of the systolic array between row 0 and row M?1, and pass the respective row of the left-hand side data through a corresponding row of the systolic array between rows 0 and M?1. For a second data type, the systolic processor may split each element of the left-hand side data and the right-hand side data into respective first and second element halves, and move each element half through a corresponding row of the systolic array between rows 0 and 2M?1.

Abstract: A circuit comprises an input register configured to receive an input vector of elements, a control register configured to receive a control vector of elements, wherein each element of the control vector corresponds to a respective element of the input vector, and wherein each element specifies a permutation of a corresponding element of the input vector, and a permute execution circuit configured to generate an output vector of elements corresponding to a permutation of the input vector. Generating each element of the output vector comprises accessing, at the input register, a particular element of the input vector, accessing, at the control register, a particular element of the control vector corresponding to the particular element of the input vector, and outputting the particular element of the input vector as an element at a particular position of the output vector that is selected based on the particular element of the control vector.

Abstract: A circuit for performing neural network computations for a neural network comprising a plurality of layers, the circuit comprising: activation circuitry configured to receive a vector of accumulated values and configured to apply a function to each accumulated value to generate a vector of activation values; and normalization circuitry coupled to the activation circuitry and configured to generate a respective normalized value from each activation value.

Abstract: Apparatus and methods for providing therapeutic treatment for symptoms associated with GERD and/or other digestive disorders and/or other medical conditions are described herein. In some embodiments, an apparatus includes a support element that has a first end portion and a second end portion and a top surface disposed at an angle relative to a bottom surface of the support element. The second end portion has a height greater than the first end portion. A riser element is configured to be coupled proximate to the second end portion of the support element. A body element is configured to be disposed on at least one of the support element or the riser element. The body element has a first arm and a second arm connected together by an arc portion.

Abstract: Apparatus and methods for providing therapeutic treatment for symptoms associated with GERD and/or other digestive disorders and/or other medical conditions are described herein. In some embodiments, an apparatus includes a support element and a conformable riser element adjacent the support element. The riser element and the support element collectively form a body support member configured to support a user and define a receiving portion configured to receive a portion of the user's arm. The riser element and the support element are each disposed within a casing formed at least in part with a stretch material. In some embodiments, the riser element includes a polyester filler material and the stretch material includes a four-way stretch material. The four-way stretch material in combination with the polyester filler material enables the riser element to be conformable.

Abstract: Apparatus and methods for providing therapeutic treatment for symptoms associated with GERD and/or other digestive disorders and/or other medical conditions are described herein. In some embodiments, an apparatus includes a support element and a conformable riser element adjacent the support element. The riser element and the support element collectively form a body support member configured to support a user and define a receiving portion configured to receive a portion of the user's arm. The riser element and the support element are each disposed within a casing formed at least in part with a stretch material. In some embodiments, the riser element includes a polyester filler material and the stretch material includes a four-way stretch material. The four-way stretch material in combination with the polyester filler material enables the riser element to be conformable.

Abstract: Apparatus and methods for providing therapeutic treatment for symptoms associated with GERD and/or other digestive disorders and/or other medical conditions are described herein. In some embodiments, an apparatus includes a support element that has a first end portion and a second end portion and a top surface disposed at an angle relative to a bottom surface of the support element. The second end portion has a height greater than the first end portion. A riser element is configured to be coupled proximate to the second end portion of the support element. A body element is configured to be disposed on at least one of the support element or the riser element. The body element has a first arm and a second arm connected together by an arc portion.

Abstract: A vector processing unit is described, and includes processor units that each include multiple processing resources. The processor units are each configured to perform arithmetic operations associated with vectorized computations. The vector processing unit includes a vector memory in data communication with each of the processor units and their respective processing resources. The vector memory includes memory banks configured to store data used by each of the processor units to perform the arithmetic operations. The processor units and the vector memory are tightly coupled within an area of the vector processing unit such that data communications are exchanged at a high bandwidth based on the placement of respective processor units relative to one another, and based on the placement of the vector memory relative to each processor unit.

Abstract: A circuit comprises an input register configured to receive an input vector of elements, a control register configured to receive a control vector of elements, wherein each element of the control vector corresponds to a respective element of the input vector, and wherein each element specifies a permutation of a corresponding element of the input vector, and a permute execution circuit configured to generate an output vector of elements corresponding to a permutation of the input vector. Generating each element of the output vector comprises accessing, at the input register, a particular element of the input vector, accessing, at the control register, a particular element of the control vector corresponding to the particular element of the input vector, and outputting the particular element of the input vector as an element at a particular position of the output vector that is selected based on the particular element of the control vector.

Abstract: A circuit for performing neural network computations for a neural network comprising a plurality of layers, the circuit comprising: activation circuitry configured to receive a vector of accumulated values and configured to apply a function to each accumulated value to generate a vector of activation values; and normalization circuitry coupled to the activation circuitry and configured to generate a respective normalized value from each activation value.