Abstract: Certain aspects of the present disclosure are directed towards methods and apparatus for oscillating signal generation. An example method generally includes: configuring a first voltage-controlled oscillator (VCO) core of a multi-core VCO based on an oscillating frequency of a second VCO core of the multi-core VCO; and generating, via the second VCO core, an oscillating signal with the oscillating frequency, wherein the first VCO core is off while the oscillating signal is generated via the second VCO core.

Abstract: Certain aspects of the present disclosure are directed towards methods and apparatus for oscillating signal generation. An example method generally includes: configuring a first voltage-controlled oscillator (VCO) core of a multi-core VCO based on an oscillating frequency of a second VCO core of the multi-core VCO; and generating, via the second VCO core, an oscillating signal with the oscillating frequency, wherein the first VCO core is off while the oscillating signal is generated via the second VCO core.

Abstract: Certain aspects of the present disclosure are directed towards techniques and apparatus for oscillating signal generation. An example apparatus generally includes a VCO and a first filter coupled to the VCO, wherein the first filter comprises: a first inductive element including a first terminal coupled to the voltage rail and a second terminal coupled to the VCO, a first capacitor bank coupled between the second terminal of the first inductive element and a reference potential node, and a bypass capacitive element coupled between the first terminal of the first inductive element and the reference potential node.

Abstract: The present invention relates to novel inventive compound device structures, enabling charged-based logic gates. In particular, a switched p-channel and/or n-channel current field effect transistor, a solid state device based on a complimentary pair of a switched p-channel and n-channel current field effect transistors, and/or a solid state device based on a complimentary pair of a p-channel and n-channel current field effect transistors are used for constructing such logic gates. The switched current field effect transistor comprising a source and a drain, wherein the source and drain defines a channel, a diffusion that divides the channel into a source channel segment between the source and the diffusion and a drain channel segment between the drain and the diffusion, a source channel gate that is coupled to the source channel, and a drain channel gate that coupled to the drain channel. These novel device structures provide various improvements over the conventional devices.