Patents by Inventor Aaron DeBattista

Aaron DeBattista has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240256237
    Abstract: The present disclosure relates to A data processing apparatus, comprising: graph partitioning circuitry configured to receive a computation graph, the computation graph comprising a plurality of nodes representing operators and a plurality of edges representing relationships amongst the plurality of operators, and to divide the computation graph into a plurality of partitions, each partition comprising one or more nodes and/or edges; graph compilation circuitry configured to compile a computation graph to generate one or more compilation outputs; and storage to store the one or more compilation outputs; wherein the graph compilation circuitry is configured to: compile a first partition of the plurality of partitions to generate a first compilation output; and output the first compilation output to a first target portion of the storage assigned to the first partition.
    Type: Application
    Filed: January 25, 2024
    Publication date: August 1, 2024
    Applicant: Arm Limited
    Inventors: Derek Andrew Lamberti, Aaron Debattista
  • Patent number: 11995475
    Abstract: An information processing apparatus is described for processing a workload. The information processing apparatus comprises a processor and a memory element connected to the processor via a data link. In advance of processing a workload, the information processing apparatus estimates an access time required to transfer an amount of the workload that is to be transferred from the external memory element to the processor, and estimates a processing time for the processor to process the workload. A processing rate characteristic of the processor and/or a data transfer rate between the memory and the processor is set in dependence upon the estimated processing time and estimated access time. Methods for varying a quality of service (QoS) value of requests to the external memory element are also described.
    Type: Grant
    Filed: October 28, 2020
    Date of Patent: May 28, 2024
    Assignee: Arm Limited
    Inventors: Daren Croxford, Sharjeel Saeed, Jayavarapu Srinivasa Rao, Aaron Debattista
  • Patent number: 11892972
    Abstract: Systems, apparatuses and methods suitable for optimizing synchronization mechanisms for multi-core processors are provided. The synchronizing mechanisms may be optimized by receiving a command stream which comprises a plurality of commands including one or more wait commands, wherein each wait command has an associated state and one or more associated conditions; sequentially processing each command in the command stream until a wait command is reached; checking the state associated with the wait command to be processed, wherein if said state is a blocking state, further processing of commands in the command stream is paused until each of said wait command's associated conditions are met, and wherein if said state is a non-blocking state, the next command in the command stream is retrieved and processed.
    Type: Grant
    Filed: September 8, 2021
    Date of Patent: February 6, 2024
    Assignee: Arm Limited
    Inventors: Aaron Debattista, Jared Corey Smolens
  • Patent number: 11625578
    Abstract: A method apparatus and computer readable medium for processing input data using a neural network comprising at least a first layer and a second layer. The method comprising the steps of applying a partitioning scheme to the input data, to partition the input data into a plurality of blocks, each block representing a portion of the input data. At the first layer of the neural network, the blocks of the input data are processed in a first order to generate intermediary data, wherein the intermediary data is partitioned into a plurality of intermediary blocks. At the second layer of the neural network, the intermediary blocks are processed in a second order, wherein the second order differs from the first order.
    Type: Grant
    Filed: March 30, 2020
    Date of Patent: April 11, 2023
    Assignee: ARM Limited
    Inventors: Sharjeel Saeed, Aaron DeBattista, Daren Croxford
  • Publication number: 20230084603
    Abstract: Aspects of the present disclosure relate to apparatus comprising execution circuitry comprising at least one execution unit to execute program instructions, and control circuitry. The control circuitry receives a stream of processing instructions, and issues each received instruction to one of said at least one execution unit. Responsive to determining that a first type of context switch is to be performed from an initial context to a new context, issuing continues until a pre-emption point in the stream of processing instructions is reached. Responsive to reaching the pre-emption point, state information is stored, and the new context is switched to. Responsive to determining that a context switch is to be performed to return from the new context to the initial context, the processing status is restored from the state information, and the stream of processing instructions is continued.
    Type: Application
    Filed: September 14, 2021
    Publication date: March 16, 2023
    Inventors: Eric KUNZE, Jared Corey SMOLENS, Aaron DEBATTISTA, Elliot Maurice Simon ROSEMARINE
  • Publication number: 20230077301
    Abstract: Systems, apparatuses and methods suitable for optimizing synchronization mechanisms for multi-core processors are provided. The synchronizing mechanisms may be optimized by receiving a command stream which comprises a plurality of commands including one or more wait commands, wherein each wait command has an associated state and one or more associated conditions; sequentially processing each command in the command stream until a wait command is reached; checking the state associated with the wait command to be processed, wherein if said state is a blocking state, further processing of commands in the command stream is paused until each of said wait command's associated conditions are met, and wherein if said state is a non-blocking state, the next command in the command stream is retrieved and processed.
    Type: Application
    Filed: September 8, 2021
    Publication date: March 9, 2023
    Inventors: Aaron DEBATTISTA, Jared Corey SMOLENS
  • Publication number: 20220129321
    Abstract: An information processing apparatus is described for processing a workload. The information processing apparatus comprises a processor and a memory element connected to the processor via a data link. In advance of processing a workload, the information processing apparatus estimates an access time required to transfer an amount of the workload that is to be transferred from the external memory element to the processor, and estimates a processing time for the processor to process the workload. A processing rate characteristic of the processor and/or a data transfer rate between the memory and the processor is set in dependence upon the estimated processing time and estimated access time. Methods for varying a quality of service (QoS) value of requests to the external memory element are also described.
    Type: Application
    Filed: October 28, 2020
    Publication date: April 28, 2022
    Inventors: Daren CROXFORD, Sharjeel SAEED, Jayavarapu Srinivasa RAO, Aaron DEBATTISTA
  • Publication number: 20210303974
    Abstract: A method apparatus and computer readable medium for processing input data using a neural network comprising at least a first layer and a second layer. The method comprising the steps of applying a partitioning scheme to the input data, to partition the input data into a plurality of blocks, each block representing a portion of the input data. At the first layer of the neural network, the blocks of the input data are processed in a first order to generate intermediary data, wherein the intermediary data is partitioned into a plurality of intermediary blocks. At the second layer of the neural network, the intermediary blocks are processed in a second order, wherein the second order differs from the first order.
    Type: Application
    Filed: March 30, 2020
    Publication date: September 30, 2021
    Inventors: Sharjeel SAEED, Aaron DEBATTISTA, Daren CROXFORD
  • Publication number: 20170280073
    Abstract: Disclosed are apparatus and methods for denoising a video stream of a camera. A current frame of the video stream and a temporally adjacent frame of the video stream that has been previously spatially and temporally denoised are obtained. The current frame is first spatially denoised, while preserving edges in such current frame to generate a plurality of spatially denoised pixels for the current frame. A particular pixel of the current frame is then both spatially and temporally denoised based on a weighted averaging of the particular pixel's associated spatially denoised pixel from the current frame and a plurality of pixels from the temporally adjacent frame that have already been spatially and temporally denoised.
    Type: Application
    Filed: March 31, 2017
    Publication date: September 28, 2017
    Applicant: ZiiLabs Inc., Ltd.
    Inventor: Aaron DeBattista
  • Patent number: 9615039
    Abstract: Disclosed are apparatus and methods for denoising a video stream of a camera. A current frame of the video stream and a temporally adjacent frame of the video stream that has been previously spatially and temporally denoised are obtained. The current frame is first spatially denoised, while preserving edges in such current frame to generate a plurality of spatially denoised pixels for the current frame. A particular pixel of the current frame is then both spatially and temporally denoised based on a weighted averaging of the particular pixel's associated spatially denoised pixel from the current frame and a plurality of pixels from the temporally adjacent frame that have already been spatially and temporally denoised.
    Type: Grant
    Filed: May 19, 2015
    Date of Patent: April 4, 2017
    Assignee: ZIILABS INC., LTD.
    Inventor: Aaron DeBattista
  • Patent number: 9575566
    Abstract: Technologies for performing two-dimensional gesture recognition are described. In some embodiments the technologies include systems, methods, and computer readable media for performing two-dimensional gesture recognition on one or more input images. In some embodiments the technologies use an object detector to detect one or more suspected gestures in an input image, and to generate a first set of hits correlating to detected gestures in the input image. At least a portion of false positive hits may then be removed by the application of one or more filters to the first set of hits. Custom hand gesture filters are also described.
    Type: Grant
    Filed: December 15, 2014
    Date of Patent: February 21, 2017
    Assignee: Intel Corporation
    Inventors: Aaron DeBattista, Michael E. Kounavis
  • Patent number: 9536136
    Abstract: Embodiments of a system and methods for skin detection and pose determination of a hand in an image are generally described herein. A method for may include detecting skin pixels in an image using a multi-layer skin filter and classifying the skin pixels into a set of foreground skin pixels and a set of background skin pixels. The method may include storing information about the set of background skin pixels in a persistent memory. The method may include determining a set of features from the set of foreground skin pixels, and clustering features from the set of features to create a set of hand pose descriptors. The method may include determining a set of candidate hand pose region descriptors and a set of candidate hand pose contour descriptors that match the set of hand pose descriptors and detecting a valid hand pose using the sets of candidate descriptors.
    Type: Grant
    Filed: March 24, 2015
    Date of Patent: January 3, 2017
    Assignee: Intel Corporation
    Inventors: Michael Kounavis, Aaron Debattista
  • Publication number: 20160283784
    Abstract: Embodiments of a system and methods for skin detection and pose determination of a hand in an image are generally described herein. A method for may include detecting skin pixels in an image using a multi-layer skin filter and classifying the skin pixels into a set of foreground skin pixels and a set of background skin pixels. The method may include storing information about the set of background skin pixels in a persistent memory. The method may include determining a set of features from the set of foreground skin pixels, and clustering features from the set of features to create a set of hand pose descriptors. The method may include determining a set of candidate hand pose region descriptors and a set of candidate hand pose contour descriptors that match the set of hand pose descriptors and detecting a valid hand pose using the sets of candidate descriptors.
    Type: Application
    Filed: March 24, 2015
    Publication date: September 29, 2016
    Inventors: Michael Kounavis, Aaron Debattista
  • Publication number: 20160170492
    Abstract: Technologies for performing two-dimensional gesture recognition are described. In some embodiments the technologies include systems, methods, and computer readable media for performing two-dimensional gesture recognition on one or more input images. In some embodiments the technologies use an object detector to detect one or more suspected gestures in an input image, and to generate a first set of hits correlating to detected gestures in the input image. At least a portion of false positive hits may then be removed by the application of one or more filters to the first set of hits. Custom hand gesture filters are also described.
    Type: Application
    Filed: December 15, 2014
    Publication date: June 16, 2016
    Inventors: Aaron DeBattista, Michael E. Kounavis
  • Patent number: 9256780
    Abstract: A mechanism is described for facilitating intelligent detection of body segmentation for enhanced gesture recognition on computing devices according to one embodiment. A method of embodiments, as described herein, includes receiving an image, dividing the image into components representing regions of the image, determining orientation and a centroid relating to each component, facilitating generation of hypothesis cuts within hysteresis points, and calculating a first ratio based on an average width of the hypothesis cuts and a length of a first axis of a component. The method may further include segmenting the component at one of the hypothesis cuts to determine an intermediate cut of the component, if the first ratio is greater than a predetermined threshold. The method may further include iteratively segmenting the component to determine a final cut.
    Type: Grant
    Filed: September 22, 2014
    Date of Patent: February 9, 2016
    Assignee: Intel Corporation
    Inventor: Aaron DeBattista
  • Publication number: 20150256772
    Abstract: Disclosed are apparatus and methods for denoising a video stream of a camera. A current frame of the video stream and a temporally adjacent frame of the video stream that has been previously spatially and temporally denoised are obtained. The current frame is first spatially denoised, while preserving edges in such current frame to generate a plurality of spatially denoised pixels for the current frame. A particular pixel of the current frame is then both spatially and temporally denoised based on a weighted averaging of the particular pixel's associated spatially denoised pixel from the current frame and a plurality of pixels from the temporally adjacent frame that have already been spatially and temporally denoised.
    Type: Application
    Filed: May 19, 2015
    Publication date: September 10, 2015
    Applicant: ZiiLabs Inc. Ltd.
    Inventor: Aaron DEBATTISTA
  • Patent number: 9041834
    Abstract: Disclosed are apparatus and methods for denoising a video stream of a camera. A current frame of the video stream and a temporally adjacent frame of the video stream that has been previously spatially and temporally denoised are obtained. The current frame is first spatially denoised, while preserving edges in such current frame to generate a plurality of spatially denoised pixels for the current frame. A particular pixel of the current frame is then both spatially and temporally denoised based on a weighted averaging of the particular pixel's associated spatially denoised pixel from the current frame and a plurality of pixels from the temporally adjacent frame that have already been spatially and temporally denoised.
    Type: Grant
    Filed: September 19, 2012
    Date of Patent: May 26, 2015
    Assignee: ZiiLabs Inc., Ltd.
    Inventor: Aaron DeBattista
  • Publication number: 20140078347
    Abstract: Disclosed are apparatus and methods for denoising a video stream of a camera. A current frame of the video stream and a temporally adjacent frame of the video stream that has been previously spatially and temporally denoised are obtained. The current frame is first spatially denoised, while preserving edges in such current frame to generate a plurality of spatially denoised pixels for the current frame. A particular pixel of the current frame is then both spatially and temporally denoised based on a weighted averaging of the particular pixel's associated spatially denoised pixel from the current frame and a plurality of pixels from the temporally adjacent frame that have already been spatially and temporally denoised.
    Type: Application
    Filed: September 19, 2012
    Publication date: March 20, 2014
    Inventor: Aaron DeBattista