Patents by Inventor Aaron Eppler
Aaron Eppler has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230245895Abstract: Exemplary semiconductor processing methods may include depositing a boron-containing material on the substrate. The boron-containing material may extend along sidewalls of the one or more features in the substrate. The methods may include forming a plasma of an oxygen-containing precursor and contacting the substrate with plasma effluents of the oxygen-containing precursor. The contacting may etch a portion of the one or more features in the substrate. The contacting may oxidize the boron-containing material.Type: ApplicationFiled: February 1, 2022Publication date: August 3, 2023Applicant: Applied Materials, Inc.Inventors: Zhonghua Yao, Qian Fu, Aaron Eppler, Mukund Srinivasan
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Patent number: 10763142Abstract: A system for controlling a condition of a wafer processing chamber is disclosed. According the principles of the present disclosure, the system includes memory and a first controller. The memory stores a plurality of profiles of respective ones of a plurality of first control elements. The plurality of first control elements are arranged throughout the chamber. The first controller determines non-uniformities in a substrate processing parameter associated with the plurality of first control elements. The substrate processing parameter is different than the condition of the chamber. The first controller adjusts at least one of the plurality of profiles based on the non-uniformities in the substrate processing parameter and a sensitivity of the substrate processing parameter to the condition.Type: GrantFiled: September 21, 2015Date of Patent: September 1, 2020Assignee: LAM RESEARCH CORPORATIONInventors: Marcus Musselman, Juan Valdivia, III, Hua Xiang, Andrew D. Bailey, III, Yoko Yamaguchi, Qian Fu, Aaron Eppler
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Patent number: 10446394Abstract: Methods and apparatuses for spacer profile control using atomic layer deposition (ALD) in multi-patterning processes are described herein. A silicon oxide spacer is deposited over a patterned core material and a target layer of a substrate in a multi-patterning scheme. A first thickness of the silicon oxide spacer is deposited by multiple ALD cycles under a first oxidation condition that includes an oxidation time, a plasma power, and a substrate temperature. A second thickness of the silicon oxide spacer is deposited by multiple ALD cycles under a second oxidation condition, where the second oxidation condition is different than the first oxidation condition by one or more parameters. After etching the patterned core material, a resulting profile of the silicon oxide spacer is dependent at least in part on the first and second oxidation conditions.Type: GrantFiled: January 26, 2018Date of Patent: October 15, 2019Assignee: Lam Research CorporationInventors: Mirzafer Abatchev, Qian Fu, Yoko Yamaguchi, Aaron Eppler
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Publication number: 20190237330Abstract: Methods and apparatuses for spacer profile control using atomic layer deposition (ALD) in multi-patterning processes are described herein. A silicon oxide spacer is deposited over a patterned core material and a target layer of a substrate in a multi-patterning scheme. A first thickness of the silicon oxide spacer is deposited by multiple ALD cycles under a first oxidation condition that includes an oxidation time, a plasma power, and a substrate temperature. A second thickness of the silicon oxide spacer is deposited by multiple ALD cycles under a second oxidation condition, where the second oxidation condition is different than the first oxidation condition by one or more parameters. After etching the patterned core material, a resulting profile of the silicon oxide spacer is dependent at least in part on the first and second oxidation conditions.Type: ApplicationFiled: January 26, 2018Publication date: August 1, 2019Inventors: Mirzafer Abatchev, Qian Fu, Yoko Yamaguchi, Aaron Eppler
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Patent number: 10242883Abstract: A method for etching features in an OMOM stack with first layer of silicon oxide, a second layer of a metal containing material over the first layer, a third layer of silicon oxide over the second layer, and a fourth layer of a metal containing material over the third layer is provided. A hardmask is formed over the stack. The hardmask is patterned. The OMOM stack is etched through the hardmask.Type: GrantFiled: June 23, 2017Date of Patent: March 26, 2019Assignee: Lam Research CorporationInventors: Joydeep Guha, Sirish K. Reddy, Kaushik Chattopadhyay, Thomas W. Mountsier, Aaron Eppler, Thorsten Lill, Vahid Vahedi, Harmeet Singh
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Publication number: 20180374712Abstract: A method for etching features in an OMOM stack with first layer of silicon oxide, a second layer of a metal containing material over the first layer, a third layer of silicon oxide over the second layer, and a fourth layer of a metal containing material over the third layer is provided. A hardmask is formed over the stack. The hardmask is patterned. The OMOM stack is etched through the hardmask.Type: ApplicationFiled: June 23, 2017Publication date: December 27, 2018Inventors: Joydeep GUHA, Sirish K. REDDY, Kaushik CHATTOPADHYAY, Thomas W. MOUNTSIER, Aaron EPPLER, Thorsten LILL, Vahid VAHEDI, Harmeet SINGH
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Patent number: 9899227Abstract: A system and method of ion milling performed in a plasma etch system including a plasma etch chamber, multiple process gas sources coupled to the plasma etch chamber, a radio frequency bias source and a controller. The plasma etch chamber including a substrate support. The substrate support being a non-pivoting and non-rotating substrate support. The substrate support capable of supporting a substrate to be processed on a top surface of the substrate support without use of a mechanical clamp device. The plasma etch chamber also including an upper electrode disposed opposite from the top surface of the substrate support. The radio frequency bias source is coupled to the substrate support. The controller is coupled to the plasma etch chamber, the multiple process gas sources and the radio frequency bias source. The controller including logic stored on computer readable media for performing an ion milling process in the plasma etch chamber.Type: GrantFiled: February 20, 2013Date of Patent: February 20, 2018Assignee: Lam Research CorporationInventors: Joydeep Guha, Butsurin Jinnai, Jun Hee Han, Aaron Eppler
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Patent number: 9659783Abstract: A method for etching features in a stack is provided. A combination hardmask is formed by forming a first hardmask layer comprising carbon or silicon oxide over the stack, forming a second hardmask layer comprising metal over the first hardmask layer, and patterning the first and second hardmask layers. The stack is etched through the combination hardmask.Type: GrantFiled: March 27, 2015Date of Patent: May 23, 2017Assignee: Lam Research CorporationInventors: Joydeep Guha, Sirish K. Reddy, Kaushik Chattopadhyay, Thomas W. Mountsier, Aaron Eppler, Thorsten Lill, Vahid Vahedi, Harmeet Singh
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Publication number: 20170040170Abstract: A processing volume is formed within an interior of a chamber between a top surface of a substrate support and a top dielectric window. An upper portion of the processing volume is a plasma generation volume. A lower portion of the processing volume is a reaction volume. A coil antennae is disposed above the dielectric window and connected to receive RF power. A process gas input is positioned to supply a process gas to the plasma generation volume. A series of magnets is disposed around a radial periphery of the chamber at a location below the top dielectric window. The series of magnets is configured to generate magnetic fields that extend across the processing volume. The series of magnets is positioned relative to the plasma generation volume such that at least a portion of the magnetic fields generated by the series of magnets is located below the plasma generation volume.Type: ApplicationFiled: August 6, 2015Publication date: February 9, 2017Inventors: Joydeep Guha, Aaron Eppler
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Publication number: 20160370796Abstract: A system for controlling a condition of a wafer processing chamber is disclosed. According the principles of the present disclosure, the system includes memory and a first controller. The memory stores a plurality of profiles of respective ones of a plurality of first control elements. The plurality of first control elements are arranged throughout the chamber. The first controller determines non-uniformities in a substrate processing parameter associated with the plurality of first control elements. The substrate processing parameter is different than the condition of the chamber. The first controller adjusts at least one of the plurality of profiles based on the non-uniformities in the substrate processing parameter and a sensitivity of the substrate processing parameter to the condition.Type: ApplicationFiled: September 21, 2015Publication date: December 22, 2016Inventors: Marcus Musselman, Juan Valdivia, III, Hua Xiang, Andrew D. Bailey, III, Yoko Yamaguchi, Qian Fu, Aaron Eppler
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Publication number: 20150200106Abstract: A method for etching features in a stack is provided. A combination hardmask is formed by forming a first hardmask layer comprising carbon or silicon oxide over the stack, forming a second hardmask layer comprising metal over the first hardmask layer, and patterning the first and second hardmask layers. The stack is etched through the combination hardmask.Type: ApplicationFiled: March 27, 2015Publication date: July 16, 2015Inventors: Joydeep GUHA, Sirish K. REDDY, Kaushik CHATTOPADHYAY, Thomas W. MOUNTSIER, Aaron EPPLER, Thorsten LILL, Vahid VAHEDI, Harmeet SINGH
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Patent number: 9018103Abstract: A method for etching features in a stack is provided. A combination hardmask is formed by forming a first hardmask layer comprising carbon or silicon oxide over the stack, forming a second hardmask layer comprising metal over the first hardmask layer, and patterning the first and second hardmask layers. The stack is etched through the combination hardmask.Type: GrantFiled: September 26, 2013Date of Patent: April 28, 2015Assignee: Lam Research CorporationInventors: Joydeep Guha, Sirish K. Reddy, Kaushik Chattopadhyay, Thomas W. Mountsier, Aaron Eppler, Thorsten Lill, Vahid Vahedi, Harmeet Singh
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Publication number: 20150087154Abstract: A method for etching features in a stack is provided. A combination hardmask is formed by forming a first hardmask layer comprising carbon or silicon oxide over the stack, forming a second hardmask layer comprising metal over the first hardmask layer, and patterning the first and second hardmask layers. The stack is etched through the combination hardmask.Type: ApplicationFiled: September 26, 2013Publication date: March 26, 2015Inventors: Joydeep GUHA, Sirish K. REDDY, Kaushik CHATTOPADHYAY, Thomas W. MOUNTSIER, Aaron EPPLER, Thorsten LILL, Vahid VAHEDI, Harmeet SINGH
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Publication number: 20140235056Abstract: A system and method of ion milling performed in a plasma etch system including a plasma etch chamber, multiple process gas sources coupled to the plasma etch chamber, a radio frequency bias source and a controller. The plasma etch chamber including a substrate support. The substrate support being a non-pivoting and non-rotating substrate support. The substrate support capable of supporting a substrate to be processed on a top surface of the substrate support without use of a mechanical clamp device. The plasma etch chamber also including an upper electrode disposed opposite from the top surface of the substrate support. The radio frequency bias source is coupled to the substrate support. The controller is coupled to the plasma etch chamber, the multiple process gas sources and the radio frequency bias source. The controller including logic stored on computer readable media for performing an ion milling process in the plasma etch chamber.Type: ApplicationFiled: February 20, 2013Publication date: August 21, 2014Applicant: LAM RESEARCH CORPORATIONInventors: Joydeep Guha, Butsurin Jinnai, Jun Hee Han, Aaron Eppler
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Publication number: 20100327413Abstract: A method for opening a carbon-based hardmask layer formed on an etch layer over a substrate is provided. The hardmask layer is disposed below a patterned mask. The substrate is placed in a plasma processing chamber. The hardmask layer is opened by flowing a hardmask opening gas including a COS component into the plasma chamber, forming a plasma from the hardmask opening gas, and stopping the flow of the hardmask opening gas. The hardmask layer may be made of amorphous carbon, or made of spun-on carbon, and the hardmask opening gas may further include O2.Type: ApplicationFiled: May 2, 2008Publication date: December 30, 2010Applicant: LAM RESEARCH CORPORATIONInventors: Jong Pil Lee, Seiji Kawaguchi, Camelia Rusu, Zhisong Huang, Mukund Srinivasan, Eric Hudson, Aaron Eppler
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Patent number: 7682480Abstract: A method for etching a feature in an etch layer through a photoresist mask over a substrate is provided. A substrate with an etch layer disposed below a photoresist mask is placed in a process chamber. The photoresist mask is conditioned, wherein the conditioning comprises providing a conditioning gas comprising a hydrogen containing gas with a flow rate and at least one of a fluorocarbon and a hydrofluorocarbon with a flow rate to the process chamber; and energizing the conditioning gas to form the conditioning plasma. The conditioning plasma is stepped. An etch plasma is provided to the process chamber, wherein the etch plasma is different than the conditioning plasma. A feature is etched in the etch layer with the etch plasma.Type: GrantFiled: January 25, 2006Date of Patent: March 23, 2010Assignee: Lam Research CorporationInventors: Keren Jacobs Kanarik, Aaron Eppler
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Patent number: 7645707Abstract: A method for etching a dielectric layer over a substrate and disposed below a mask is provided. The substrate is placed in a plasma processing chamber. An etchant gas comprising O2 and a sulfur component gas comprising at least one of H2S and a compound containing at least one carbon sulfur bond is provided into the plasma chamber. A plasma is formed from the etchant gas. Features are etched into the etch layer through the photoresist mask with the plasma from the etchant gas.Type: GrantFiled: March 30, 2005Date of Patent: January 12, 2010Assignee: Lam Research CorporationInventors: Camelia Rusu, Zhisong Huang, Mukund Srinivasan, Eric A. Hudson, Aaron Eppler
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Patent number: 7547635Abstract: A process of etching openings in a dielectric layer includes supporting a semiconductor substrate in a plasma etch reactor, the substrate having a dielectric layer and a patterned photoresist and/or hardmask layer above the dielectric layer; supplying to the plasma etch reactor an etchant gas comprising (a) a fluorocarbon gas (CxFyHz, where x?1, y?1, and z?0), (b) a silane-containing gas, hydrogen or a hydrocarbon gas (CxHy, where x?1 and y?4), (c) an optional oxygen-containing gas, and (d) an optional inert gas, wherein the flow rate ratio of the silane-containing gas to fluorocarbon gas is less than or equal to 0.1, or the flow rate ratio of the hydrogen or hydrocarbon gas to fluorocarbon gas is less than or equal to 0.5; energizing the etchant gas into a plasma; and plasma etching openings in the dielectric layer with enhanced photoresist/hardmask to dielectric layer selectivity and/or minimal photoresist distortion or striation.Type: GrantFiled: June 14, 2002Date of Patent: June 16, 2009Assignee: Lam Research CorporationInventors: Aaron Eppler, Mukund Srinivasan, Robert Chebi
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Patent number: 7544521Abstract: A method of trimming the critical dimension of an isolated line to a greater extent than a dense line is provided. A mask is formed of an organic material over the etch layer wherein the mask has at least a first region with a first pattern density and a second region with a second pattern density. A surface area of the organic material in the first region is measured. A surface area of the organic material in the second region is measured. A reverse bias trim of the mask is provided, wherein a ratio of a trim rate of the organic material in the first region to a trim rate of the organic material in the second region is related to a ratio of the measured surface area of the organic material in the first region to the measured surface area of the organic material in the second region.Type: GrantFiled: September 11, 2006Date of Patent: June 9, 2009Assignee: Lam Research CorporationInventors: Scott Briggs, Aaron Eppler
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Patent number: 7405521Abstract: A workpiece is processed with a plasma in a vacuum plasma processing chamber by exciting the plasma at several frequencies such that the excitation of the plasma by the several frequencies simultaneously causes several different phenomena to occur in the plasma. The chamber includes central top and bottom electrodes and a peripheral top and/or bottom electrode arrangement that is either powered by RF or is connected to a reference potential by a filter arrangement that passes at least one of the plasma excitation frequencies to the exclusion of other frequencies.Type: GrantFiled: August 22, 2003Date of Patent: July 29, 2008Assignee: Lam Research CorporationInventors: Raj Dhindsa, S. M. Reza Sadjadi, Felix Kozakevich, Dave Trussell, Lumin Li, Eric Lenz, Camelia Rusu, Mukund Srinivasan, Aaron Eppler, Jim Tietz, Jeffrey Marks