Patents by Inventor Aaron M. Ramirez

Aaron M. Ramirez has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12002773
    Abstract: An electrical device includes a substrate, an insulating layer supported by the substrate, and an electrically conductive vertical interconnect disposed in a via hole of the insulating layer. The insulating layer may be configured to provide a coefficient of thermal expansion (CTE) that is equal to or greater than a CTE of the vertical interconnect to thereby impart axial compressive forces at opposite ends of the interconnect. The vertical interconnect may be a hybrid interconnect structure including a low CTE conductor post having a pocket that contains a high CTE conductor contact. At low operating temperatures, the high CTE conductor contact is under tension due to the higher CTE, and thus the high CTE conductor contact relieves strain in the device by void expansion and elongation.
    Type: Grant
    Filed: March 3, 2021
    Date of Patent: June 4, 2024
    Assignee: Raytheon Company
    Inventors: Andrew Clarke, Chad Fulk, Aaron M. Ramirez
  • Publication number: 20220285298
    Abstract: An electrical device includes a substrate, an insulating layer supported by the substrate, and an electrically conductive vertical interconnect disposed in a via hole of the insulating layer. The insulating layer may be configured to provide a coefficient of thermal expansion (CTE) that is equal to or greater than a CTE of the vertical interconnect to thereby impart axial compressive forces at opposite ends of the interconnect. The vertical interconnect may be a hybrid interconnect structure including a low CTE conductor post having a pocket that contains a high CTE conductor contact. At low operating temperatures, the high CTE conductor contact is under tension due to the higher CTE, and thus the high CTE conductor contact relieves strain in the device by void expansion and elongation.
    Type: Application
    Filed: March 3, 2021
    Publication date: September 8, 2022
    Inventors: Andrew Clarke, Chad Fulk, Aaron M. Ramirez
  • Publication number: 20220115348
    Abstract: An electronic device for interconnection with an integrated circuit device is provided. The electronic device includes an interconnection surface configured to oppose the integrated circuit device with an interconnect structure disposed therebetween. The electronic device also includes at least one electronic device contact pad disposed on the interconnection surface for bonding to the interconnect structure. The at least one electronic device contact pad has at least one 3-dimensional projection configured to extend from the electronic device contact pad toward the integrated circuit device. The at least one 3-dimensional projection is configured to aid in bonding the electronic device contact pad to the interconnect structure to electrically couple the electronic device to the integrated circuit device.
    Type: Application
    Filed: October 12, 2020
    Publication date: April 14, 2022
    Inventors: Sean F. Harris, Sean P. Kilcoyne, Aaron M. Ramirez, Joseph N. Wilde
  • Patent number: 9142694
    Abstract: A method for bonding a first semiconductor body having a plurality of electromagnetic radiation detectors to a second semiconductor body having read out integrated circuits for the detectors. The method includes: aligning electrical contacts for the plurality of electromagnetic radiation detectors with electrical contacts of the read out integrated circuits; tacking the aligned electrical contacts for the plurality of electromagnetic radiation detectors with electrical contacts of the read out integrated circuits to form an intermediate stage structure; packaging the intermediate stage structure into a vacuum sealed electrostatic shielding container having flexible walls; inserting the package with the intermediate stage structure therein into an isostatic pressure chamber; and applying the isostatic pressure to the intermediate stage structure through walls of the container. The container includes a stand-off to space walls of the container from edges of the first semiconductor body.
    Type: Grant
    Filed: December 2, 2013
    Date of Patent: September 22, 2015
    Assignee: Raytheon Company
    Inventors: Kenneth Allen Gerber, Jonathan Getty, Aaron M. Ramirez, Scott S. Miller
  • Publication number: 20150118784
    Abstract: A method for bonding a first semiconductor body having a plurality of electromagnetic radiation detectors to a second semiconductor body having read out integrated circuits for the detectors. The method includes: aligning electrical contacts for the plurality of electromagnetic radiation detectors with electrical contacts of the read out integrated circuits; tacking the aligned electrical contacts for the plurality of electromagnetic radiation detectors with electrical contacts of the read out integrated circuits to form an intermediate stage structure; packaging the intermediate stage structure into a vacuum sealed electrostatic shielding container having flexible walls; inserting the package with the intermediate stage structure therein into an isostatic pressure chamber; and applying the isostatic pressure to the intermediate stage structure through walls of the container. The container includes a stand-off to space walls of the container from edges of the first semiconductor body.
    Type: Application
    Filed: December 2, 2013
    Publication date: April 30, 2015
    Applicant: Raytheon Company
    Inventors: Kenneth Allen Gerber, Jonathan Getty, Aaron M. Ramirez, Scott S. Miller
  • Publication number: 20120273951
    Abstract: A contact structure for interconnecting a first substrate to an indium interconnect structure on a second substrate. The contact structure comprises a diffusive layer and a non-oxidizing layer, with a thickness of less than approximately 150 nm, positioned on the diffusive layer for alignment with the indium interconnect.
    Type: Application
    Filed: September 13, 2011
    Publication date: November 1, 2012
    Applicant: RAYTHEON COMPANY
    Inventors: Jonathan Getty, Andreas Hampp, Aaron M. Ramirez, Scott S. Miller