Patents by Inventor Aaron O. Vanderpool

Aaron O. Vanderpool has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080160683
    Abstract: A method including implanting carbon and fluorine into a substrate in an area of the substrate between a source/drain region and a channel, the area designated for a source/drain extension; and a source/drain extension dopant following implanting carbon and fluorine, implanting phosphorous in the area. A method including disrupting a crystal lattice of a semiconductor substrate in an area of the substrate between a source/drain region and a channel designated for a source/drain extension; after disrupting, implanting carbon and fluorine in the area; and implanting phosphorous in the area. A method including performing a boron halo implant before implanting phosphorous to form N-type source/drain extensions. An apparatus including an N-type transistor having a source/drain extension comprising carbon and phosphorous, formed in an area of a substrate between a source/drain region of the transistor and a channel of the transistor.
    Type: Application
    Filed: December 29, 2006
    Publication date: July 3, 2008
    Inventors: Aaron O. Vanderpool, Mitchell C. Taylor
  • Patent number: 7235843
    Abstract: The use of a carbon implant, in addition to the conventional fluorine implant, may significantly reduce the transient enhanced diffusion in P-type source drain extension regions. As a result, resistivity may be reduced, and dopant density may be increased, increasing current drive in some embodiments.
    Type: Grant
    Filed: January 5, 2006
    Date of Patent: June 26, 2007
    Assignee: Intel Corporation
    Inventors: Aaron O. Vanderpool, Mitchell C. Taylor
  • Patent number: 7015108
    Abstract: The use of a carbon implant, in addition to the conventional fluorine implant, may significantly reduce the transient enhanced diffusion in P-type source drain extension regions. As a result, resistivity may be reduced, and dopant density may be increased, increasing current drive in some embodiments.
    Type: Grant
    Filed: February 26, 2004
    Date of Patent: March 21, 2006
    Assignee: Intel Corporation
    Inventors: Aaron O. Vanderpool, Mitchell C. Taylor