Patents by Inventor Aaron Olbrich
Aaron Olbrich has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20210161423Abstract: A mobile touchable system for user fitness and health monitoring is presented. The system is designed in one form as a mobile phone case and in another form as integrated in a mobile phone. It encompasses a series of measurement devices, including, but not limited to, arrays of electrodes for bio-impedance analysis, impedance tomography, and electrocardiographs, near-infrared spectroscopy for glucose level measurement, and heart rate monitoring. The touchable system performs incidental measurement in the background each time the user holds the mobile phone and hence enables long term health monitoring without user intervention. The touchable monitoring system further performs targeted spot measurements by following defined procedures. Spot measurement is enhanced through an extension measurement cable. Furthermore, an extension strap along with the mobile touchable system provides detailed activity tracking.Type: ApplicationFiled: February 21, 2018Publication date: June 3, 2021Applicant: Vita Analytics Inc.Inventors: Aaron Olbrich, Bijoy Purushothaman, Manish Dalwani, Sachin Ramesh Gandhi
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Patent number: 9959078Abstract: Systems and methods for increasing performance and reducing power consumption of a non-volatile memory system while the system acquires status information from a plurality of memory die are described. The non-volatile memory system may include a plurality of memory die and a system controller for controlling operations performed by each memory die of the plurality of memory die (e.g., read operations, write operations, or erase operations). The system controller may transmit or broadcast a first status command to each memory die of the plurality of memory die and in response simultaneously or concurrently receive one or more sets of status information from each memory die of the plurality of memory die. The status information may include ready/busy status information (e.g., indicating that a memory die is able to receive new data), programming loop count information, and erase loop count information.Type: GrantFiled: October 30, 2015Date of Patent: May 1, 2018Assignee: SANDISK TECHNOLOGIES LLCInventors: Grishma Shah, Jack Frayer, Aaron Olbrich, Chang Siau, Vidyabhushan Mohan, Gopinath Balakrishnan, Robert Ellis
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Patent number: 9703816Abstract: The embodiments described herein are methods and systems to enhance the reliability and performance of a persistent datastore (e.g., non-volatile memory such as flash memory). The method includes generating a log entry associated with first write data. The method also includes generating a first record including the log entry, the first write data, and pointer to a second record different from the first record. The method further includes performing a single write operation that includes writing the first record to the persistent datastore.Type: GrantFiled: December 19, 2013Date of Patent: July 11, 2017Assignee: SANDISK TECHNOLOGIES LLCInventors: Johann George, Aaron Olbrich
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Patent number: 9612948Abstract: In the present disclosure, a persistent storage device includes both persistent storage, which includes a set of persistent storage blocks, and a storage controller. The persistent storage device stores and retrieves data in response to commands received from an external host device. The persistent storage device stores data, from a contiguous data block, to two or more sets of logical address blocks in persistent storage. The persistent storage device also retrieves data, corresponding to a contiguous data block, from two or more sets of logical address blocks in persistent. In both instances, the two or more sets of logical address blocks in persistent storage, in aggregate, are not contiguous.Type: GrantFiled: March 14, 2013Date of Patent: April 4, 2017Assignee: SANDISK TECHNOLOGIES LLCInventors: Johann George, Aaron Olbrich
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Patent number: 9501398Abstract: A persistent storage device includes both persistent storage, which includes a set of persistent storage blocks, and NVRAM, and in particular a set of NVRAM blocks. The persistent storage device also typically includes a storage controller. The persistent storage device, in addition to responding to commands to write data directly to and to read data directly from persistent storage blocks is also configured to write data to specified NVRAM blocks (e.g., specified by a host NVRAM write command) and to transfer data from a specified NVRAM block to a specified persistent storage block. As a result, multiple writes to a particular persistent storage block can be replaced with multiple writes to an NVRAM block and a subsequent single write to the particular persistent storage block. This reduces the number of writes to persistent storage and also reduces the number of corresponding block erase operations.Type: GrantFiled: March 14, 2013Date of Patent: November 22, 2016Assignee: SANDISK TECHNOLOGIES LLCInventors: Johann George, Aaron Olbrich, Brian O'Krafka, Darpan Dinker, Patrick Chiu, Evgeny Firsov
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Publication number: 20160224246Abstract: Systems and methods for increasing performance and reducing power consumption of a non-volatile memory system while the system acquires status information from a plurality of memory die are described. The non-volatile memory system may include a plurality of memory die and a system controller for controlling operations performed by each memory die of the plurality of memory die (e.g., read operations, write operations, or erase operations). The system controller may transmit or broadcast a first status command to each memory die of the plurality of memory die and in response simultaneously or concurrently receive one or more sets of status information from each memory die of the plurality of memory die. The status information may include ready/busy status information (e.g., indicating that a memory die is able to receive new data), programming loop count information, and erase loop count information.Type: ApplicationFiled: October 30, 2015Publication date: August 4, 2016Applicant: SANDISK TECHNOLOGIES INC.Inventors: Grishma Shah, Jack Frayer, Aaron Olbrich, Chang Siau, Vidyabhushan Mohan, Gopinath Balakrishnan, Robert Ellis
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Publication number: 20150142860Abstract: The embodiments described herein are methods and systems to enhance the reliability and performance of a persistent datastore (e.g., non-volatile memory such as flash memory). The method includes generating a log entry associated with first write data. The method also includes generating a first record including the log entry, the first write data, and pointer to a second record different from the first record. The method further includes performing a single write operation that includes writing the first record to the persistent datastore.Type: ApplicationFiled: December 19, 2013Publication date: May 21, 2015Applicant: SanDisk Enterprise IP LLCInventors: Johann George, Aaron Olbrich
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Publication number: 20140189264Abstract: In the present disclosure, a persistent storage device includes both persistent storage, which includes a set of persistent storage blocks, and a storage controller. The persistent storage device stores and retrieves data in response to commands received from an external host device. The persistent storage device stores data, from a contiguous data block, to two or more sets of logical address blocks in persistent storage. The persistent storage device also retrieves data, corresponding to a contiguous data block, from two or more sets of logical address blocks in persistent. In both instances, the two or more sets of logical address blocks in persistent storage, in aggregate, are not contiguous.Type: ApplicationFiled: March 14, 2013Publication date: July 3, 2014Inventors: Johann George, Aaron Olbrich
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Publication number: 20140189211Abstract: In the present disclosure, a persistent storage device includes both persistent storage, which includes a set of persistent storage blocks, and a storage controller. The persistent storage device stores and retrieves data in response to commands received from an external host device. The persistent storage device stores a logical block address to physical address mapping. The persistent storage device also, in response to a remapping command, stores an updated logical block address to physical block address mapping.Type: ApplicationFiled: March 14, 2013Publication date: July 3, 2014Inventors: Johann George, Aaron Olbrich
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Publication number: 20140181373Abstract: A persistent storage device includes both persistent storage, which includes a set of persistent storage blocks, and NVRAM, and in particular a set of NVRAM blocks. The persistent storage device also typically includes a storage controller. The persistent storage device, in addition to responding to commands to write data directly to and to read data directly from persistent storage blocks is also configured to write data to specified NVRAM blocks (e.g., specified by a host NVRAM write command) and to transfer data from a specified NVRAM block to a specified persistent storage block. As a result, multiple writes to a particular persistent storage block can be replaced with multiple writes to an NVRAM block and a subsequent single write to the particular persistent storage block. This reduces the number of writes to persistent storage and also reduces the number of corresponding block erase operations.Type: ApplicationFiled: March 14, 2013Publication date: June 26, 2014Inventors: Johann George, Aaron Olbrich, Brian O'Krafka, Darpan Dinker, Patrick Chiu, Evgeny Firsov
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Publication number: 20070294468Abstract: Apparatus for enabling access to Flash random access memory devices at substantially the same bandwidth and speed for both reading and writing. A plurality of processors can be dynamically and/or statically configured into separate portions to handle reading and writing actions. One portion can be arranged to separately handle interfacing with high speed connections to receive and respond to read and write commands from an external system. The second portion can be arranged to handle high speed access over an interface that can both read serially and write in parallel to the Flash random access memory device. By writing in parallel to the Flash random access memory device with multiple processors, the write mode is at least somewhat equivalent to or greater than the speed and bandwidth for a serial read of the memory device.Type: ApplicationFiled: February 14, 2007Publication date: December 20, 2007Inventors: Aaron Olbrich, Douglas Prius
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Patent number: 6944717Abstract: Methods for controlling and storing data in a cache buffer in a storage apparatus having a nonvolatile memory medium are disclosed. Memory cells are logically divided into a plurality of pages. An open status is registered in a counter for each page that has at least some (and usually all) memory cells available to store new data. A full status is registered in the counter for each page that does not have memory cells that are available to store new data. New data is stored in pages having the open status in the counter. The pages can be weighted according to the read command rate and prioritized for reading and writing purposes.Type: GrantFiled: July 11, 2002Date of Patent: September 13, 2005Assignee: Fujitsu LimitedInventors: Koji Yoneyama, Yuichi Hirao, Shigeru Hatakeyama, Aaron Olbrich, Douglas Prins
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Publication number: 20030041214Abstract: Data to be retrieved from a non-volatile storage medium is identified by considering previously stored cache data in a cache buffer is disclosed. When a request for data is received from a host, the requested data is ear-marked for retrieval, with a desired amount of pre-read data and a desired amount of pre-fetch or read-ahead data. It is then determined whether any of the data is already in the cache buffer, and how much of a gap, if any, exists between the desired data and that already stored in the cache buffer. If some of the data is already in cache, then a controller has to satisfy the read request with a single continuous retrieval of data from the storage medium, such that the data as stored in the cache buffer is not interrupted by gaps within the cache buffer. In this manner, buffer usage rate is increased while maintaining the same cache hit rate in a particular access pattern to evaluate hard disk drive performance.Type: ApplicationFiled: July 26, 2002Publication date: February 27, 2003Applicant: FUJITSU LIMITEDInventors: Yuichi Hirao, Koji Yoneyama, Shigeru Hatakeyama, Kazuyuki Hori, Aaron Olbrich, Douglas Prins
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Publication number: 20030023815Abstract: Methods for controlling and storing data in a cache buffer in a storage apparatus having a nonvolatile memory medium are disclosed. Memory cells are logically divided into a plurality of pages. An open status is registered in a counter for each page that has at least some (and usually all) memory cells available to store new data. A full status is registered in the counter for each page that does not have memory cells that are available to store new data. New data is stored in pages having the open status in the counter. The pages can be weighted according to the read command rate and prioritized for reading and writing purposes.Type: ApplicationFiled: July 11, 2002Publication date: January 30, 2003Applicant: FUJITSU LIMITEDInventors: Koji Yoneyama, Yuichi Hirao, Shigeru Hatakeyama, Aaron Olbrich, Douglas Prins