Patents by Inventor Aaron Steyskal

Aaron Steyskal has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11682106
    Abstract: Examples disclosed herein obtain first image data and the second image data for a foveated image frame to be displayed on a display, the first image data to have a first resolution and the second image data to have a second resolution lower than the first resolution. Disclosed examples also up-sample the second image data based on first metadata to generate up-sampled second image data, the up-sampled second image data to have the first resolution, and combine the first image data and the up-sampled second image data based on second metadata. Disclosed examples further perform, based on third metadata, a combination of at least two different filter operations on an overlap region including a portion of the first image data and a portion of the up-sampled second image data to generate the foveated image frame, the third metadata to specify a width in pixels of the overlap region.
    Type: Grant
    Filed: March 15, 2021
    Date of Patent: June 20, 2023
    Assignee: Intel Corporation
    Inventors: Aaron Steyskal, Nausheen Ansari, Nobuyuki Suzuki, Zhiming Zhuang, Atsuo Kuwahara, Gary K. Smith
  • Publication number: 20210201446
    Abstract: Examples disclosed herein obtain first image data and the second image data for a foveated image frame to be displayed on a display, the first image data to have a first resolution and the second image data to have a second resolution lower than the first resolution. Disclosed examples also up-sample the second image data based on first metadata to generate up-sampled second image data, the up-sampled second image data to have the first resolution, and combine the first image data and the up-sampled second image data based on second metadata. Disclosed examples further perform, based on third metadata, a combination of at least two different filter operations on an overlap region including a portion of the first image data and a portion of the up-sampled second image data to generate the foveated image frame, the third metadata to specify a width in pixels of the overlap region.
    Type: Application
    Filed: March 15, 2021
    Publication date: July 1, 2021
    Inventors: Aaron Steyskal, Nausheen Ansari, Nobuyuki Suzuki, Zhiming Zhuang, Atsuo Kuwahara, Gary K. Smith
  • Patent number: 10949947
    Abstract: Example methods, apparatus, systems and articles of manufacture (e.g., non-transitory physical storage media) to implement foveated image rendering for head-mounted displays device are disclosed herein. Example head-mounted display devices disclosed herein include a frame buffer to store first and second image data for an image frame, the first image data having a first resolution and the second image data having a second resolution lower than the first resolution, the first image data and the second image data obtained from a host device via a data interface. Disclosed example head-mounted display devices also include a device controller to up-sample the second image data based on first metadata from the host device to generate up-sampled second image data having the first resolution, and combine the first image data and the up-sampled second image data based on second metadata from the host device to render a foveated image frame on a display.
    Type: Grant
    Filed: December 29, 2017
    Date of Patent: March 16, 2021
    Assignee: Intel Corporation
    Inventors: Aaron Steyskal, Nausheen Ansari, Nobuyuki Suzuki, Zhiming Zhuang, Atsuo Kuwahara, Gary K. Smith
  • Publication number: 20190043167
    Abstract: Example methods, apparatus, systems and articles of manufacture (e.g., non-transitory physical storage media) to implement foveated image rendering for head-mounted displays device are disclosed herein. Example head-mounted display devices disclosed herein include a frame buffer to store first and second image data for an image frame, the first image data having a first resolution and the second image data having a second resolution lower than the first resolution, the first image data and the second image data obtained from a host device via a data interface. Disclosed example head-mounted display devices also include a device controller to up-sample the second image data based on first metadata from the host device to generate up-sampled second image data having the first resolution, and combine the first image data and the up-sampled second image data based on second metadata from the host device to render a foveated image frame on a display.
    Type: Application
    Filed: December 29, 2017
    Publication date: February 7, 2019
    Inventors: Aaron Steyskal, Nausheen Ansari, Nobuyuki Suzuki, Zhiming Zhuang, Atsuo Kuwahara, Gary K. Smith
  • Publication number: 20060145360
    Abstract: A wound capacitor has a lead configuration that enables enhanced control over equivalent series resistance (ESR) and equivalent series inductance (ESL). The capacitor has a case and a wound foil disposed within the case. A ball-and-lead configuration is coupled to the foil and extends from the case.
    Type: Application
    Filed: January 25, 2006
    Publication date: July 6, 2006
    Inventors: Aaron Steyskal, Tao Liu, Steve Schivelev, Peir Chu, Mike Greenwood
  • Publication number: 20050195555
    Abstract: A capacitor with reduced equivalent series resistance and reduces equivalent series inductance is provided. Capacitors are provided with multiple plate assemblies that couple to a common single first polarity terminal. Capacitors are also provided with multiple plate assemblies that each couple to a respective second polarity terminal. Fan-like plate assemblies are arranged to provide increased capacitance with reduced equivalent series resistance and reduces equivalent series inductance. Capacitors are provided that mount using surface mounting technology. Capacitors are provided that conform to existing capacitor form factors.
    Type: Application
    Filed: March 2, 2004
    Publication date: September 8, 2005
    Inventors: Aaron Steyskal, Larry Mosley, Tony Tran
  • Publication number: 20050128677
    Abstract: A wound capacitor has a lead configuration that enables enhanced control over equivalent series resistance (ESR) and equivalent series inductance (ESL). The capacitor has a case and a wound foil disposed within the case. A ball-and-lead configuration is coupled to the foil and extends from the case.
    Type: Application
    Filed: December 15, 2003
    Publication date: June 16, 2005
    Inventors: Aaron Steyskal, Tao Liu, Steve Schiveley, Peir Chu, Mike Greenwood
  • Patent number: 6862784
    Abstract: A method of fabricating a capacitor provides for coupling a ball grid array (BGA) lead configuration to a foil and disposing the foil within a case. The BGA lead configuration extends from the case.
    Type: Grant
    Filed: January 16, 2003
    Date of Patent: March 8, 2005
    Assignee: Intel Corporation
    Inventors: Tao Liu, Steve Schiveley, Peir Chu, Mike Greenwood, Aaron Steyskal
  • Patent number: 6704187
    Abstract: A termination assembly for a capacitor provides controlled ESR and ESL. First and second termination elements are attached to first and second foils to provide terminal connections. The first and second foils are wound into a cylinder such that the first and second termination elements form a shape within the cylinder and are spaced apart by a first distance. First and second leads are extending from the termination elements, respectively, such that the first and second leads are spaced apart by a second distance different from the first distance.
    Type: Grant
    Filed: September 24, 2001
    Date of Patent: March 9, 2004
    Assignee: Intel Corporation
    Inventors: Steve Schiveley, Mike Greenwood, Tao Liu, Peir Chu, Aaron Steyskal
  • Publication number: 20030103317
    Abstract: A wound capacitor has a lead configuration that enables enhanced control over equivalent series resistance (ESR) and equivalent series inductance (ESL). The capacitor has a case and a wound foil disposed within the case. A ball grid array (BGA) lead configuration is coupled to the foil and extends from the case.
    Type: Application
    Filed: January 16, 2003
    Publication date: June 5, 2003
    Inventors: Tao Liu, Steve Schiveley, Peir Chu, Mike Greenwood, Aaron Steyskal
  • Publication number: 20030058603
    Abstract: A termination assembly for a capacitor provides controlled ESR and ESL. First and second termination elements are attached to first and second foils to provide terminal connections. The first and second foils are wound into a cylinder such that the first and second termination elements form a shape within the cylinder and are spaced apart by a first distance. First and second leads are extending from the termination elements, respectively, such that the first and second leads are spaced apart by a second distance different from the first distance.
    Type: Application
    Filed: September 24, 2001
    Publication date: March 27, 2003
    Inventors: Steve Schiveley, Mike Greenwood, Tao Liu, Peir Chu, Aaron Steyskal
  • Patent number: 6529365
    Abstract: A wound capacitor has a lead configuration that enables enhanced control over equivalent series resistance (ESR) and equivalent series inductance (ESL). The capacitor has a case and a wound foil disposed within the case. A ball grid array (BGA) lead configuration is coupled to the foil and extends from the case.
    Type: Grant
    Filed: September 28, 2001
    Date of Patent: March 4, 2003
    Assignee: Intel Corporation
    Inventors: Tao Liu, Steve Schiveley, Peir Chu, Mike Greenwood, Aaron Steyskal