Patents by Inventor Aaron Vallett

Aaron Vallett has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12230673
    Abstract: Semiconductor structures including electrical isolation and methods of forming a semiconductor structure including electrical isolation. The structure includes a semiconductor substrate having a first surface, a recess in the first surface, and a second surface inside the first recess. The structure further includes a shallow trench isolation region extending from the first surface into the semiconductor substrate. The shallow trench isolation region is positioned to surround an active device region including the recess. A field-effect transistor includes a gate electrode positioned on a portion of the second surface.
    Type: Grant
    Filed: March 30, 2022
    Date of Patent: February 18, 2025
    Assignee: GlobalFoundries U.S. Inc.
    Inventors: Michel Abou-Khalil, Steven M. Shank, Aaron Vallett, Sarah McTaggart, Rajendran Krishnasamy
  • Publication number: 20240088157
    Abstract: Semiconductor device structures with device isolation and methods of forming a semiconductor device structure with device isolation. The structure comprises a semiconductor substrate, a first semiconductor layer on the semiconductor substrate, a second semiconductor layer in a cavity in the first semiconductor layer, and a device structure including a doped region in the second semiconductor layer. The first semiconductor layer comprises a porous semiconductor material, and the second semiconductor layer comprises a single-crystal semiconductor material.
    Type: Application
    Filed: September 12, 2022
    Publication date: March 14, 2024
    Inventors: Michel Abou-Khalil, Steven M. Shank, Sarah McTaggart, Aaron Vallett, Rajendran Krishnasamy, Megan Lydon-Nuhfer
  • Publication number: 20230317776
    Abstract: Semiconductor structures including electrical isolation and methods of forming a semiconductor structure including electrical isolation. The structure includes a semiconductor substrate having a first surface, a recess in the first surface, and a second surface inside the first recess. The structure further includes a shallow trench isolation region extending from the first surface into the semiconductor substrate. The shallow trench isolation region is positioned to surround an active device region including the recess. A field-effect transistor includes a gate electrode positioned on a portion of the second surface.
    Type: Application
    Filed: March 30, 2022
    Publication date: October 5, 2023
    Inventors: Michel Abou-Khalil, Steven M. Shank, Aaron Vallett, Sarah McTaggart, Rajendran Krishnasamy
  • Patent number: 11658177
    Abstract: Semiconductor device structures with substrate biasing, methods of forming a semiconductor device structure with substrate biasing, and methods of operating a semiconductor device structure with substrate biasing. A substrate contact is coupled to a portion of a bulk semiconductor substrate in a device region. The substrate contact is configured to be biased with a negative bias voltage. A field-effect transistor includes a semiconductor body in the device region of the bulk semiconductor substrate. The semiconductor body is electrically isolated from the portion of the bulk semiconductor substrate.
    Type: Grant
    Filed: December 7, 2020
    Date of Patent: May 23, 2023
    Assignee: GlobalFoundries U.S. Inc.
    Inventors: Anthony K. Stamper, Michel J. Abou-Khalil, John J. Ellis-Monaghan, Randy Wolf, Alvin J. Joseph, Aaron Vallett
  • Publication number: 20220181317
    Abstract: Semiconductor device structures with substrate biasing, methods of forming a semiconductor device structure with substrate biasing, and methods of operating a semiconductor device structure with substrate biasing. A substrate contact is coupled to a portion of a bulk semiconductor substrate in a device region. The substrate contact is configured to be biased with a negative bias voltage. A field-effect transistor includes a semiconductor body in the device region of the bulk semiconductor substrate. The semiconductor body is electrically isolated from the portion of the bulk semiconductor substrate.
    Type: Application
    Filed: December 7, 2020
    Publication date: June 9, 2022
    Inventors: Anthony K. Stamper, Michel J. Abou-Khalil, John J. Ellis-Monaghan, Randy Wolf, Alvin J. Joseph, Aaron Vallett
  • Patent number: 11315825
    Abstract: Structures including electrical isolation and methods associated with forming such structures. A semiconductor layer has a top surface, a polycrystalline region, and a single-crystal region between the polycrystalline region and the top surface. An isolation band is located beneath the single-crystal region. The isolation band contains a first concentration of an n-type dopant and a second concentration of a p-type dopant, and a net difference between the first concentration and the second concentration is within a range of about five percent to about fifteen percent.
    Type: Grant
    Filed: August 28, 2019
    Date of Patent: April 26, 2022
    Assignee: GlobalFoundries U.S. Inc.
    Inventors: Michel J. Abou-Khalil, Aaron Vallett, Steven M. Shank, Bojidha Babu, John J. Ellis-Monaghan, Anthony K. Stamper
  • Publication number: 20210066118
    Abstract: Structures including electrical isolation and methods associated with forming such structures. A semiconductor layer has a top surface, a polycrystalline region, and a single-crystal region between the polycrystalline region and the top surface. An isolation band is located beneath the single-crystal region. The isolation band contains a first concentration of an n-type dopant and a second concentration of a p-type dopant, and a net difference between the first concentration and the second concentration is within a range of about five percent to about fifteen percent.
    Type: Application
    Filed: August 28, 2019
    Publication date: March 4, 2021
    Inventors: Michel J. Abou-Khalil, Aaron Vallett, Steven M. Shank, Bojidha Babu, John J. Ellis-Monaghan, Anthony K. Stamper