Patents by Inventor Aashish S. Pangam

Aashish S. Pangam has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Computing subsystem hardware recovery via automated selective power cycling
    Patent number: 9766676
    Abstract: Various embodiments are generally directed to automated selective power cycling of an inoperative hardware-based subsystem of a computing device, while not power cycling other components of the computing device, in response to detection of that subsystem becoming inoperative. An apparatus comprising a controller processor circuit; a first component comprising digital logic and provided with electric power controlled by the controller processor circuit; a second component comprising digital logic and provided with electric power controlled by the controller processor circuit; and a controller storage communicatively coupled to the controller processor circuit and arranged to store instructions operative on the controller processor circuit to receive a signal that indicates that the first component is inoperative, and cycle the electric power to the first component while continuing to provide electric power to the second component based on the signal. Other embodiments are described and claimed herein.
    Type: Grant
    Filed: December 28, 2012
    Date of Patent: September 19, 2017
    Assignee: INTEL CORPORATION
    Inventors: Balakesan P. Thevar, Aashish S. Pangam
  • COMPUTING SUBSYSTEM HARDWARE RECOVERY VIA AUTOMATED SELECTIVE POWER CYCLING
    Publication number: 20150220126
    Abstract: Various embodiments are generally directed to automated selective power cycling of an inoperative hardware-based subsystem of a computing device, while not power cycling other components of the computing device, in response to detection of that subsystem becoming inoperative. An apparatus comprising a controller processor circuit; a first component comprising digital logic and provided with electric power controlled by the controller processor circuit; a second component comprising digital logic and provided with electric power controlled by the controller processor circuit; and a controller storage communicatively coupled to the controller processor circuit and arranged to store instructions operative on the controller processor circuit to receive a signal that indicates that the first component is inoperative, and cycle the electric power to the first component while continuing to provide electric power to the second component based on the signal. Other embodiments are described and claimed herein.
    Type: Application
    Filed: December 28, 2012
    Publication date: August 6, 2015
    Inventors: Balakesan P. Thevar, Aashish S. Pangam