Patents by Inventor Aayush Gupta

Aayush Gupta has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10193489
    Abstract: A motor drive system for controlling operation of an electric machine is described. An inverter includes paired power transistors that are electrically connected to the electric machine, wherein the inverter is electrically connected to a DC power source via a high-voltage electrical power bus. A motor controller includes a first controller and an acoustic signal generator, wherein the first controller is disposed to control the paired power transistors of the inverter. The first controller determines an initial output voltage based upon a torque command and the acoustic signal generator is disposed to generate a sound injection voltage. The motor controller combines the initial output voltage and the sound injection voltage. The motor controller generates PWM commands to control the paired power transistors of the inverter, wherein the PWM commands are determined based upon the initial output voltage and the sound injection voltage.
    Type: Grant
    Filed: June 9, 2017
    Date of Patent: January 29, 2019
    Assignee: GM Global Technology Operations LLC
    Inventors: Yo Chan Son, Si-hyung Lee, Aayush Gupta
  • Publication number: 20180358916
    Abstract: A motor drive system for controlling operation of an electric machine is described. An inverter includes paired power transistors that are electrically connected to the electric machine, wherein the inverter is electrically connected to a DC power source via a high-voltage electrical power bus. A motor controller includes a first controller and an acoustic signal generator, wherein the first controller is disposed to control the paired power transistors of the inverter. The first controller determines an initial output voltage based upon a torque command and the acoustic signal generator is disposed to generate a sound injection voltage. The motor controller combines the initial output voltage and the sound injection voltage. The motor controller generates PWM commands to control the paired power transistors of the inverter, wherein the PWM commands are determined based upon the initial output voltage and the sound injection voltage.
    Type: Application
    Filed: June 9, 2017
    Publication date: December 13, 2018
    Applicant: GM GLOBAL TECHNOLOGY OPERATIONS LLC
    Inventors: Yo Chan Son, Si-hyung Lee, Aayush Gupta
  • Patent number: 10140066
    Abstract: In one general embodiment, a computer-implemented method includes creating multiple pools of micro services. Each of the pools includes a specific configuration set and resource properties. Also, the computer-implemented method includes receiving incoming workloads. Moreover, the computer-implemented method includes, for each of the incoming workloads, dynamically mapping the incoming workload, based on characteristics of the incoming workload, to an access path traversing a combination of a subset of the pools of micro services.
    Type: Grant
    Filed: February 1, 2016
    Date of Patent: November 27, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Aayush Gupta, Dean Hildebrand, Nagapramod S. Mandagere, Mohit Saxena
  • Patent number: 10140054
    Abstract: One embodiment provides a method for retrospective snapshot creation including creating, by a processor, a first snapshot that captures logical state of a data store at a first time in a time range. Creation of the first snapshot is based on determining existence of a second snapshot that captures logical state of the data store and recording a retrospective snapshot at a last valid log address offset prior to the first time upon a determination that the second snapshot exists based on determining at least one of: whether log address offsets from a first log entry of a log to a log entry of the log at the first time are contiguous and whether log address offsets from the second snapshot to the first time are contiguous.
    Type: Grant
    Filed: September 29, 2016
    Date of Patent: November 27, 2018
    Assignee: International Business Machines Corporation
    Inventors: Lawrence Y. Chiu, Aayush Gupta, Paul H. Muench, Sangeetha Seshadri
  • Publication number: 20180321869
    Abstract: A computer-implemented method for distributing data among memory devices may include performing successive spatial partitionings of a graph of data based upon vertices and associated edges to generate spatial partitions with each spatial partition having a respective number of edges below a threshold. The method may also include ordering the spatial partitions and distributing the spatial partitions among the memory devices based upon the ordering.
    Type: Application
    Filed: May 8, 2017
    Publication date: November 8, 2018
    Inventors: Aayush GUPTA, Sangeetha SESHADRI, Abdurrahman YASAR
  • Patent number: 10095595
    Abstract: In one embodiment, a system includes a cache storage device, a back-end storage device, and a processor and logic integrated with and/or executable by the processor. The logic is configured to receive indication of failure of a primary cache server at a secondary cache server, the primary and secondary cache servers being configured to manage read requests and write requests for the back-end storage device. The logic is also configured to set the secondary cache server to a by-pass mode for read requests directed to any portions of the back-end storage device managed by the primary cache server prior to the failure. Moreover, the logic is configured to read an index of cache block descriptors (CBDs) managed by the primary cache server prior to the failure into a memory of the secondary cache server.
    Type: Grant
    Filed: November 17, 2015
    Date of Patent: October 9, 2018
    Assignee: International Business Machines Corporation
    Inventors: Aayush Gupta, James L. Hafner, Mohit Saxena
  • Publication number: 20180267857
    Abstract: A method for memory page erasure reconstruction in a storage array includes dividing data into multiple stripes for storage in a storage array including multiple storage devices with a topology of a hypercube of a dimension t?3. The storage devices in same hypercubes of dimension t?1 including the hypercube of dimension t have even parity. An intersection of two non-parallel planes in the hypercube topology is a line, and each point along a line is a storage device in the storage array. A reconstructor processor reconstructs erased data for erased memory pages from non-erased data in the storage array by using parities in at least three dimensions based on the hypercube topology of the storage devices.
    Type: Application
    Filed: May 17, 2018
    Publication date: September 20, 2018
    Inventors: Mario Blaum, Aayush Gupta, James Hafner, Steven R. Hetzler
  • Patent number: 10031803
    Abstract: A method for distributed coding in a storage array is presented. The method includes dividing data into multiple stripes for storage in a storage array including storage devices with a topology of a hypercube of a dimension t?3. The storage devices in same hypercubes of dimension t?1 including the hypercube of a dimension t have even parity. Global parities are added to the hypercube such that a minimum distance of a code is enhanced.
    Type: Grant
    Filed: December 14, 2015
    Date of Patent: July 24, 2018
    Assignee: International Business Machines Corporation
    Inventors: Mario Blaum, Aayush Gupta, James L. Hafner, Steven R. Hetzler
  • Publication number: 20180165195
    Abstract: In one embodiment, a computer-implemented method includes selecting a cache block descriptor (CBD) from amongst a plurality of CBDs stored to a cache storage device to defragment based on a determination of utilization of a particular fine block descriptor (FBD) having a first size that is allocated to the selected CBD. The cache storage device includes a free pool of FBDs having various sizes that is available for use in the plurality of CBDs. Also, the particular FBD having the first size has a lowest availability in the free pool of FBDs. Other methods, systems, and computer program products are described in accordance with additional embodiments.
    Type: Application
    Filed: February 12, 2018
    Publication date: June 14, 2018
    Inventors: Aayush Gupta, James L. Hafner, Mohit Saxena
  • Patent number: 9971692
    Abstract: In one embodiment, a system includes a cache storage device and a processor and logic integrated with and/or executable by the processor. The logic is configured to receive a plurality of access requests for data in the cache storage device, each request being directed to data in a common cache block descriptor (CBD). The CBD stores metadata corresponding to a storage location of the data in the cache storage device. The logic is also configured to update a request queue to reflect each access request from the plurality of access requests in an order in which individual access requests were received. Moreover, the logic is configured to delay at least some overlapping access requests.
    Type: Grant
    Filed: November 17, 2015
    Date of Patent: May 15, 2018
    Assignee: International Business Machines Corporation
    Inventors: Aayush Gupta, James L. Hafner, Mohit Saxena
  • Patent number: 9965390
    Abstract: In one embodiment, a system includes a cache storage device and a processor and logic integrated with and/or executable by the processor. The logic is configured to select a cache block descriptor (CBD) from amongst a plurality of CBDs, the selected CBD including indications of being fragmented in the cache storage device. The logic is also configured to determine whether to defragment the selected CBD. Moreover, the logic is configured to defragment the selected CBD on the cache storage device in response to a decision to defragment the selected CBD.
    Type: Grant
    Filed: November 17, 2015
    Date of Patent: May 8, 2018
    Assignee: International Business Machines Corporation
    Inventors: Aayush Gupta, James L. Hafner, Mohit Saxena
  • Publication number: 20180107527
    Abstract: Provided are a computer program product, system, and method for determining storage tiers for placement of data sets during execution of tasks in a workflow. A representation of a workflow execution pattern of tasks for a job indicates a dependency of the tasks and data sets operated on by the tasks. A determination is made of an assignment of the data sets for the tasks to a plurality of the storage tiers based on the dependency of the tasks indicated in the workflow execution pattern. A moving is scheduled of a subject data set of the data sets operated on by a subject task of the tasks that is subject to an event to an assigned storage tier indicated in the assignment for the subject task subject. The moving of the data set is scheduled to be performed in response to the event with respect to the subject task.
    Type: Application
    Filed: December 15, 2017
    Publication date: April 19, 2018
    Inventors: Aayush Gupta, Sangeetha Seshadri
  • Publication number: 20180103004
    Abstract: The present disclosure is directed toward systems and methods for reengaging website visitors via a social networking system. For example, in accordance with one embodiment, a social networking system receives information regarding a user-triggered event associated with a merchant webpage, utilizes the received information to generate an electronic message from the merchant to the user, and provides the electronic message to the user via the social networking system. The user can then reengage with the merchant in response to the received electronic message.
    Type: Application
    Filed: October 7, 2016
    Publication date: April 12, 2018
    Inventors: Deniz Demir, Wenyun Yang, Robert Franklin Daniel, Yoram Talmor, Edward Young Zhang, Aayush Gupta, Ramkumar Natarajan
  • Publication number: 20180089034
    Abstract: One embodiment provides a method for retrospective snapshot creation including creating, by a processor, a first snapshot that captures logical state of a data store at a first key. Creation of the first snapshot is based on determining a log offset corresponding to the first key, determining existence of a second snapshot that captures logical state of the data store and recording a retrospective snapshot at a last valid log address offset prior to the first key upon a determination that the second snapshot exists based on determining at least one of: whether log address offsets from a first log entry of a log to a log entry of the log at the first key are contiguous and whether log address offsets from the second snapshot to the first key are contiguous.
    Type: Application
    Filed: September 29, 2016
    Publication date: March 29, 2018
    Inventors: Lawrence Y. Chiu, Aayush Gupta, Paul H. Muench, Sangeetha Seshadri
  • Publication number: 20180088816
    Abstract: One embodiment provides a method for retrospective snapshot creation including creating, by a processor, a first snapshot that captures logical state of a data store at a first time in a time range. Creation of the first snapshot is based on determining existence of a second snapshot that captures logical state of the data store and recording a retrospective snapshot at a last valid log address offset prior to the first time upon a determination that the second snapshot exists based on determining at least one of: whether log address offsets from a first log entry of a log to a log entry of the log at the first time are contiguous and whether log address offsets from the second snapshot to the first time are contiguous.
    Type: Application
    Filed: September 29, 2016
    Publication date: March 29, 2018
    Inventors: Lawrence Y. Chiu, Aayush Gupta, Paul H. Muench, Sangeetha Seshadri
  • Patent number: 9916249
    Abstract: In one embodiment, a system includes a cache storage device and a processor and logic integrated with and/or executable by the processor. The logic is configured to receive a write request including data to be written to the cache storage device. The logic is also configured to determine a size of the write request. Moreover, the logic is configured to select a chunk size from among a plurality of chunk sizes designated for storing data in the cache storage device. In addition, the logic is configured to allocate a fine block descriptor (FBD) having the selected chunk size to the write request.
    Type: Grant
    Filed: November 17, 2015
    Date of Patent: March 13, 2018
    Assignee: International Business Machines Corporation
    Inventors: Aayush Gupta, James L. Hafner, Mohit Saxena
  • Patent number: 9864642
    Abstract: Provided are a computer program product, system, and method for determining storage tiers for placement of data sets during execution of tasks in a workflow. A representation of a workflow execution pattern of tasks for a job indicates a dependency of the tasks and data sets operated on by the tasks. A determination is made of an assignment of the data sets for the tasks to a plurality of the storage tiers based on the dependency of the tasks indicated in the workflow execution pattern. A moving is scheduled of a subject data set of the data sets operated on by a subject task of the tasks that is subject to an event to an assigned storage tier indicated in the assignment for the subject task subject. The moving of the data set is scheduled to be performed in response to the event with respect to the subject task.
    Type: Grant
    Filed: July 29, 2016
    Date of Patent: January 9, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Aayush Gupta, Sangeetha Seshadri
  • Publication number: 20170329705
    Abstract: Embodiments are provided for organizing data elements in a log-structured storage system. A profile is created based on a population of data elements in cache memory related to a log structured storage system. A layout for storage of the data elements on persistent storage related to the log-structured storage system is determined, which includes identifying two or more related data elements based on the profile. A garbage collection process is performed on the persistent storage based on the determined layout, which includes placing the related data elements within substantially close proximity on the persistent storage.
    Type: Application
    Filed: May 13, 2016
    Publication date: November 16, 2017
    Applicant: International Business Machines Corporation
    Inventors: Aayush Gupta, Sangeetha Seshadri
  • Patent number: 9817713
    Abstract: One embodiment provides a method comprising, for at least one data block, selecting an erasure code from a plurality of erasure codes based on at least one property of the at least one data block and information relating to a data cache, and encoding, utilizing at least one hardware processor, the at least one data block with the selected erasure code. The information relating to the data cache includes cache space usage of the data cache.
    Type: Grant
    Filed: February 4, 2016
    Date of Patent: November 14, 2017
    Assignee: International Business Machines Corporation
    Inventors: Aayush Gupta, Mohit Saxena
  • Patent number: 9817757
    Abstract: In one embodiment, a system includes a back-end storage device, a cache storage device, and a processor and logic integrated with and/or executable by the processor. The logic is configured to store data to the cache storage device using fine block descriptors (FBDs) configured for fine-grained mapping of variable-size cache allocations. The logic is also configured to store data to the back-end storage device using cache block descriptors (CBDs) configured for coarse-grained mapping of large blocks of data. At least some FBDs are smaller in size than any of the CBDs, and all FBDs are equal to or smaller in size than any of the CBDs.
    Type: Grant
    Filed: November 17, 2015
    Date of Patent: November 14, 2017
    Assignee: International Business Machines Corporation
    Inventors: Aayush Gupta, James L. Hafner, Mohit Saxena