Patents by Inventor Abdellatif Zanati

Abdellatif Zanati has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240121897
    Abstract: An apparatus includes a printed circuit board (PCB), a solder pad, a signal via, a plurality of metalized vias, and a waveguide. The PCB has a first surface opposite a second surface and includes a first metal layer, a second metal layer having a waveguide opening, and a PCB channel region from the waveguide opening in the second metal layer to the second surface. The solder pad is positioned on the first surface of the PCB over the channel region, and the signal via is coupled to the solder pad and a via pad in the second metal layer within the waveguide opening. The plurality of metalized vias extend from the first surface to the second surface of the PCB and form a boundary around the channel region. The waveguide is affixed to the waveguide opening in the second metal layer.
    Type: Application
    Filed: October 5, 2022
    Publication date: April 11, 2024
    Inventors: Abdellatif Zanati, Adrianus Buijsman, Mark Steigemann
  • Patent number: 11749624
    Abstract: A semiconductor device and a method of making the same. The device includes an encapsulant. The device also includes a semiconductor die in the encapsulant. The device further includes electromagnetic radiation transmitting and receiving parts in the encapsulant. The device also includes an intermediate portion having a first surface and a second surface. The first surface is attached to the encapsulant. The device also includes an antenna portion attached to the second surface of the intermediate portion. The antenna portion includes one or more openings for conveying electromagnetic radiation. The intermediate portion includes one or more corresponding openings aligned with the openings of the antenna portion. Each opening of the antenna portion and each corresponding opening of the intermediate portion forms an electrically contiguous passage for conveying the electromagnetic radiation to the electromagnetic radiation transmitting and receiving parts in the encapsulant.
    Type: Grant
    Filed: July 22, 2020
    Date of Patent: September 5, 2023
    Assignee: NXP B.V.
    Inventors: Abdellatif Zanati, Michael B. Vincent
  • Patent number: 11664567
    Abstract: A method of manufacturing a device is provided. The method includes forming a first cavity in a first substrate with the first cavity having a first depth. A second cavity is formed in a second substrate with the second cavity having a second depth. The first cavity and the second cavity are aligned with each other. The first substrate is affixed to the second substrate to form a waveguide substrate having a hollow waveguide with a first dimension substantially equal to the first depth plus the second depth. A conductive layer is formed on the sidewalls of the hollow waveguide. The waveguide substrate is placed over a packaged semiconductor device, the hollow waveguide aligned with a launcher of the packaged semiconductor device.
    Type: Grant
    Filed: November 30, 2020
    Date of Patent: May 30, 2023
    Assignee: NXP B.V.
    Inventors: Adrianus Buijsman, Abdellatif Zanati, Giorgio Carluccio
  • Patent number: 11635461
    Abstract: A test apparatus and method for testing a semiconductor device. The semiconductor device includes an integrated circuit and a plurality of external radiating elements located at a surface of the device. The external radiating elements include at least one transmit element and receive element. The test apparatus includes a plunger. The plunger includes a dielectric portion having a surface for placing against the surface of the device. The plunger also includes at least one waveguide. Each waveguide extends through the plunger for routing electromagnetic radiation transmitted by one of the transmit elements of the device to one of the receive elements of the device. Each waveguide comprises a plurality of waveguide openings for coupling electromagnetically to corresponding radiating elements of the device. The dielectric portion is configured to provide a matched interface for the electromagnetic coupling of the waveguide openings to the plurality of external radiating elements of the device.
    Type: Grant
    Filed: December 8, 2020
    Date of Patent: April 25, 2023
    Assignee: NXP B.V.
    Inventors: Abdellatif Zanati, Henrik Asendorf, Jan-Peter Schat, Nicolas Lamielle
  • Patent number: 11415626
    Abstract: A method of testing a semiconductor device. An apparatus comprising a semiconductor device and a test apparatus. The semiconductor device includes an integrated circuit and a plurality of external radiating elements at a surface of the device, the radiating elements include transmit elements and receive elements. The test apparatus includes a surface for placing against the surface of the device. The test apparatus also includes at least one waveguide, which extends through the test apparatus for routing electromagnetic radiation transmitted by one of the transmit elements of the device to one of the receive elements of the device. Each waveguide comprises a plurality of waveguide openings for coupling electromagnetically to corresponding radiating elements of the plurality of radiating elements located at the surface of the device. A spacing between the waveguide openings of each waveguide is larger than, or smaller than a spacing between the corresponding radiating elements.
    Type: Grant
    Filed: December 11, 2020
    Date of Patent: August 16, 2022
    Assignee: NXP B.V.
    Inventors: Jan-Peter Schat, Abdellatif Zanati, Henrik Asendorf, Maristella Spella, Waqas Hassan Syed, Giorgio Carluccio, Antonius Johannes Matheus de Graauw
  • Publication number: 20220189894
    Abstract: An integrated circuit package comprising an encapsulant, a semiconductor die in the encapsulant the semiconductor die comprising a plurality of die terminals, an integrated waveguide launcher, wherein the integrated waveguide launcher is connected to one of the die terminals and a land grid array provided on a bottom surface of the package. The land grid array comprises a plurality of package terminals, each package terminal configured to be soldered to a printed circuit board, and an opening, wherein the opening is aligned with the integrated waveguide launcher.
    Type: Application
    Filed: December 7, 2021
    Publication date: June 16, 2022
    Inventors: Abdellatif Zanati, Adrianus Buijsman, Dominik Xaver Simon
  • Publication number: 20220173490
    Abstract: A method of manufacturing a device is provided. The method includes forming a first cavity in a first substrate with the first cavity having a first depth. A second cavity is formed in a second substrate with the second cavity having a second depth. The first cavity and the second cavity are aligned with each other. The first substrate is affixed to the second substrate to form a waveguide substrate having a hollow waveguide with a first dimension substantially equal to the first depth plus the second depth. A conductive layer is formed on the sidewalls of the hollow waveguide. The waveguide substrate is placed over a packaged semiconductor device, the hollow waveguide aligned with a launcher of the packaged semiconductor device.
    Type: Application
    Filed: November 30, 2020
    Publication date: June 2, 2022
    Inventors: Adrianus Buijsman, Abdellatif Zanati, Giorgio Carluccio
  • Patent number: 11215694
    Abstract: A radar unit (100, 300) is described that comprises: a frequency generation circuit (103, 106, 303, 306) configured to generate a millimetre wave, mmW, frequency modulated continuous wave, FMCW, transmit signal comprising a plurality of chirps; a transmitter circuit (108, 102, 308, 302) configured to transmit the generated mmW FMCW transmit signal: a receiver circuit (104, 110, 304, 310) configured to receive an echo of the mmW FMCW transmit signal; and a built-in self-test, BIST, circuit (140, 340) coupled to the receiver circuit (104, 110, 304, 310) and configured to process the echo of the mmW FMCW transmit signal.
    Type: Grant
    Filed: February 1, 2019
    Date of Patent: January 4, 2022
    Assignee: NXP B.V.
    Inventors: Jan-Peter Schat, Abdellatif Zanati
  • Patent number: 11187783
    Abstract: Embodiments of a method and a device are disclosed. In an embodiment, a method for operating a radar system is disclosed. The method involves generating a chirp signal having a repeating pattern of chirps, each chirp in the repeating pattern of chirps having a base frequency and a chirp bandwidth, wherein the repeating pattern of chirps includes at least two chirps that differ from each other in at least one of base frequency and chirp bandwidth, transmitting a radar signal according to the chirp signal, receiving radio frequency energy that includes a reflected portion of the radar signal, and selecting for processing from the received radio frequency energy a signal that matches the repeating pattern of chirps of the chirp signal.
    Type: Grant
    Filed: August 14, 2018
    Date of Patent: November 30, 2021
    Assignee: NXP B.V.
    Inventors: Michael Johannes Doescher, Abdellatif Zanati, Cicero Silveira Vaucher
  • Publication number: 20210239753
    Abstract: A test apparatus and method for testing a semiconductor device. The semiconductor device includes an integrated circuit and a plurality of external radiating elements located at a surface of the device. The external radiating elements include at least one transmit element and receive element. The test apparatus includes a plunger. The plunger includes a dielectric portion having a surface for placing against the surface of the device. The plunger also includes at least one waveguide. Each waveguide extends through the plunger for routing electromagnetic radiation transmitted by one of the transmit elements of the device to one of the receive elements of the device. Each waveguide comprises a plurality of waveguide openings for coupling electromagnetically to corresponding radiating elements of the device. The dielectric portion is configured to provide a matched interface for the electromagnetic coupling of the waveguide openings to the plurality of external radiating elements of the device.
    Type: Application
    Filed: December 8, 2020
    Publication date: August 5, 2021
    Inventors: Abdellatif Zanati, Henrik Asendorf, Jan-Peter Schat, Nicolas Lamielle
  • Publication number: 20210239754
    Abstract: A method of testing a semiconductor device. An apparatus comprising a semiconductor device and a test apparatus. The semiconductor device includes an integrated circuit and a plurality of external radiating elements at a surface of the device, the radiating elements include transmit elements and receive elements. The test apparatus includes a surface for placing against the surface of the device. The test apparatus also includes at least one waveguide, which extends through the test apparatus for routing electromagnetic radiation transmitted by one of the transmit elements of the device to one of the receive elements of the device. Each waveguide comprises a plurality of waveguide openings for coupling electromagnetically to corresponding radiating elements of the plurality of radiating elements located at the surface of the device. A spacing between the waveguide openings of each waveguide is larger than, or smaller than a spacing between the corresponding radiating elements.
    Type: Application
    Filed: December 11, 2020
    Publication date: August 5, 2021
    Inventors: Jan-Peter Schat, Abdellatif Zanati, Henrik Asendorf, Maristella Spella, Waqas Hassan Syed, Giorgio Carluccio, Antonius Johannes Matheus de Graauw
  • Patent number: 11079429
    Abstract: An ATE testing system (900, 1000) for millimetre wave (mmW) packaged integrated circuits (820) includes: at least one packaged integrated circuit (820); a radio frequency, RF, socket (700) configured to receive the at least one packaged integrated circuit (820) and facilitate routing RF signals thereto via at least one input connector and at least one output connector; and at least one interface configured to couple a tester to at least one packaged integrated circuit (820). The RF socket (700) includes a mmW absorber (1010) located adjacent the at least one output connector of the RF socket (700).
    Type: Grant
    Filed: February 26, 2018
    Date of Patent: August 3, 2021
    Assignee: NXP B.V.
    Inventors: Abdellatif Zanati, Holger Mahnke
  • Patent number: 10955528
    Abstract: A built-in self-test, BIST, radar unit (100) is described. The BIST radar unit (100) comprises: a frequency generation circuit (110) configured to generate a mmW transmit signal; a transmitter circuit comprising: at least one phase shifter (130, 132) configured apply at least one phase shift to the mmW transmit signal; and at least one phase inverter (140, 142) coupled to the at least one phase shifter (130, 132) and configured to invert a phase of the phase shifted mmW transmit signal. A receiver configured to receive and process a received version of the mmW transmit signal.
    Type: Grant
    Filed: August 31, 2018
    Date of Patent: March 23, 2021
    Assignee: NXP B.V.
    Inventors: Abdellatif Zanati, Jan-Peter Schat
  • Publication number: 20210028131
    Abstract: A semiconductor device and a method of making the same. The device includes an encapsulant. The device also includes a semiconductor die in the encapsulant. The device further includes electromagnetic radiation transmitting and receiving parts in the encapsulant. The device also includes an intermediate portion having a first surface and a second surface. The first surface is attached to the encapsulant. The device also includes an antenna portion attached to the second surface of the intermediate portion. The antenna portion includes one or more openings for conveying electromagnetic radiation. The intermediate portion includes one or more corresponding openings aligned with the openings of the antenna portion. Each opening of the antenna portion and each corresponding opening of the intermediate portion forms an electrically contiguous passage for conveying the electromagnetic radiation to the electromagnetic radiation transmitting and receiving parts in the encapsulant.
    Type: Application
    Filed: July 22, 2020
    Publication date: January 28, 2021
    Inventors: Abdellatif Zanati, Michael B. Vincent
  • Patent number: 10901023
    Abstract: An example method includes stressing, under different circuit-stress test conditions, a plurality of different types of regional circuits susceptible to time dependent dielectric breakdown (TDDB), and in response, monitoring for levels of reliability failure associated with the plurality of different types of regional circuits. The method includes storing a set of stress-test data based on each of the levels of reliability failure, the set of stress-test data being stored within the integrated circuit to indicate reliability-threshold test data specific to the integrated circuit. Within the integrated circuit, an on-chip monitoring circuit indicates operational conditions of suspect reliability associated with dielectric breakdown of at least one of the plurality of different types of regional circuits.
    Type: Grant
    Filed: August 9, 2018
    Date of Patent: January 26, 2021
    Assignee: NXP B.V.
    Inventors: Jan-Peter Schat, Abdellatif Zanati
  • Patent number: 10670699
    Abstract: Embodiments are provided for a radar device and a method for operating a radar device, the radar device having a transmitter and a receiver, the method including: generating a noise signal; mixing the noise signal with a transmitter output radio frequency (RF) signal to produce an intermediate signal, wherein the transmitter output RF signal is a version of a local oscillator (LO) signal having linearly increasing frequency; attenuating the intermediate signal to produce a test signal; adding the test signal to a receiver input RF signal to produce a combined receiver input RF signal; downmixing an amplified version of the combined receiver input RF signal with the LO signal to produce a combined low frequency signal; and correlating the combined low frequency signal with the noise signal to produce an error detection signal.
    Type: Grant
    Filed: September 7, 2017
    Date of Patent: June 2, 2020
    Assignee: NXP B.V.
    Inventors: Jan-Peter Schat, Abdellatif Zanati
  • Publication number: 20200057136
    Abstract: Embodiments of a method and a device are disclosed. In an embodiment, a method for operating a radar system is disclosed. The method involves generating a chirp signal having a repeating pattern of chirps, each chirp in the repeating pattern of chirps having a base frequency and a chirp bandwidth, wherein the repeating pattern of chirps includes at least two chirps that differ from each other in at least one of base frequency and chirp bandwidth, transmitting a radar signal according to the chirp signal, receiving radio frequency energy that includes a reflected portion of the radar signal, and selecting for processing from the received radio frequency energy a signal that matches the repeating pattern of chirps of the chirp signal.
    Type: Application
    Filed: August 14, 2018
    Publication date: February 20, 2020
    Applicant: NXP B.V.
    Inventors: Michael Johannes Doescher, Abdellatif Zanati, Cicero Silveira Vaucher
  • Publication number: 20200049756
    Abstract: An example method includes stressing, under different circuit-stress test conditions, a plurality of different types of regional circuits susceptible to time dependent dielectric breakdown (TDDB), and in response, monitoring for levels of reliability failure associated with the plurality of different types of regional circuits. The method includes storing a set of stress-test data based on each of the levels of reliability failure, the set of stress-test data being stored within the integrated circuit to indicate reliability-threshold test data specific to the integrated circuit. Within the integrated circuit, an on-chip monitoring circuit indicates operational conditions of suspect reliability associated with dielectric breakdown of at least one of the plurality of different types of regional circuits.
    Type: Application
    Filed: August 9, 2018
    Publication date: February 13, 2020
    Inventors: Jan-Peter Schat, Abdellatif Zanati
  • Publication number: 20200031312
    Abstract: A method includes generating a target map indicative of objects around the vehicle using sensor data from sensor circuitry of the vehicle, the sensor circuitry including at least one radar sensor; and determining, by processing circuitry, if the vehicle is being towed away. Determining if the vehicle is being towed away can include comparing the target map to a previously obtained target map, determining if the vehicle is moving based on the comparison, and in response to determining the vehicle is moving, outputting an alarm message indicative of the vehicle being towed away.
    Type: Application
    Filed: July 24, 2018
    Publication date: January 30, 2020
    Inventors: Jan-Peter Schat, Michael Johannes Döscher, Abdellatif Zanati
  • Publication number: 20190242973
    Abstract: A radar unit (100, 300) is described that comprises: a frequency generation circuit (103, 106, 303, 306) configured to generate a millimetre wave, mmW, frequency modulated continuous wave, FMCW, transmit signal comprising a plurality of chirps; a transmitter circuit (108, 102, 308, 302) configured to transmit the generated mmW FMCW transmit signal: a receiver circuit (104, 110, 304, 310) configured to receive an echo of the mmW FMCW transmit signal; and a built-in self-test, BIST, circuit (140, 340) coupled to the receiver circuit (104, 110, 304, 310) and configured to process the echo of the mmW FMCW transmit signal.
    Type: Application
    Filed: February 1, 2019
    Publication date: August 8, 2019
    Inventors: JAN-PETER SCHAT, Abdellatif Zanati