Patents by Inventor Abdelnaser M. Adas

Abdelnaser M. Adas has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7050782
    Abstract: A system and method for performing power management in a communication system without losing data is disclosed. The G.Lite system is an exemplary system suitable for implementing the present invention because it includes at least one operational state and an idle state in which no data is transmitted. The G.Lite standard defines ATU states. The defined states are full on state L0, low power state L1 and idle state L3. In L0 state, the ADSL link is fully operational at full data rate. In L1 state, the ADSL link is fully operational at a lower data rate. In L3 state, no signal is transmitted. Because no signal is transmitted, no idle cells are transmitted. This will result in losing the cell delineation and ATM link connectivity. Therefore, when data is received for an ATU in L3 state, data cells may be lost.
    Type: Grant
    Filed: August 27, 2002
    Date of Patent: May 23, 2006
    Assignee: Mindspeed Technologies, Inc.
    Inventors: Abdelnaser M. Adas, Joel D. Peshkin, Shahram Famorzadeh
  • Patent number: 6614794
    Abstract: A communication system for communication of data packets associated with a packet switched network is disclosed herein. The system includes a port processor, a segmentation and reassembly device, and a host processor. The port processor communicates data packets to and from at least one communication device and at least one destination. The segmentation and reassembly device routes data packets to and from the port processor and the at least one destination. The host processor establishes a virtual circuit between the port processor and the segmentation and reassembly device. The host processor further directs the port processor to communicate data traffic to the segmentation and reassembly device via the virtual circuit, whereby the port processor and segmentation and reassembly device exchange data directly via the virtual circuit without per-packet handling by the host processor of all data traffic.
    Type: Grant
    Filed: March 3, 1999
    Date of Patent: September 2, 2003
    Assignee: Conexant Systems, Inc.
    Inventors: Abdelnaser M. Adas, Joel D. Peshkin, Warner B. Andrews, Jr., Glendon C. King
  • Patent number: 6577856
    Abstract: A system and method for performing power management in a communication system without losing data is disclosed. The G.Lite system is an exemplary system suitable for implementing the present invention because it includes at least one operational state and an idle state in which no data is transmitted. The G.Lite standard defines ATU states. The defined states are full on state L0, low power state L1 and idle state L3. In L0 state, the ADSL link is fully operational at full data rate. In L1 state, the ADSL link is fully operational at a lower data rate. In L3 state, no signal is transmitted. Because no signal is transmitted, no idle cells are transmitted. This will result in losing the cell delineation and ATM link connectivity. Therefore, when data is received for an ATU in L3 state, data cells may be lost.
    Type: Grant
    Filed: May 25, 2000
    Date of Patent: June 10, 2003
    Assignee: Conexant Systems, Inc.
    Inventors: Abdelnaser M. Adas, Joel D. Peshkin, Shahram Famorzadeh