Abstract: On-chip testing of a superconductive integrated circuit device includes receiving a superconductive circuit design having superconductive logic elements. Further, a first testability characteristic for first test circuitry at a first node within the superconductive circuit design is determined. The first testability characteristic corresponds to one or more of a test generation control level and a test observability control level. An updated superconductive circuit design from the superconductive circuit design is generated based on the first testability characteristic for the first test circuitry. The superconductive circuit design includes the first test circuitry at the first node.

Abstract: A base element for switching a magnetization state of a nanomagnet includes a heavy-metal nanostrip having a surface. The heavy-metal nanostrip includes at least a first layer including a heavy metal and a second layer which includes a different heavy-metal. A ferromagnetic nanomagnet is disposed adjacent to the surface. The ferromagnetic nanomagnet includes a shape having a long axis and a short axis, the ferromagnetic nanomagnet having both a perpendicular-to-the-plane anisotropy Hkz and an in-plane anisotropy Hkx and the ferromagnetic nanomagnet having a first magnetization equilibrium state and a second magnetization equilibrium state. The first magnetization equilibrium state or the second magnetization equilibrium state is settable by a flow of electrical charge through the heavy-metal nanostrip. A direction of the flow of electrical charge through the heavy-metal nanostrip includes an angle ? with respect to the short axis of the nanomagnet.

Abstract: A hybrid integrated thermal sensor device includes a magnetic tunnel junction (MTJ) device electrically coupled in series with at least one CMOS transistor and disposed between a voltage rail terminal and a ground terminal. An output terminal is electrically coupled to a drain of the at least one CMOS transistor. The MTJ operates in an anti-parallel state and the output terminal provides a voltage indicative of a temperature of the MTJ device based on an MTJ antiparallel resistance. A distributed sensor network for real-time thermal mapping of an integrated circuit (IC) is also described.

Abstract: A hybrid integrated thermal sensor device includes a magnetic tunnel junction (MTJ) device electrically coupled in series with at least one CMOS transistor and disposed between a voltage rail terminal and a ground terminal. An output terminal is electrically coupled to a drain of the at least one CMOS transistor. The MTJ operates in an anti-parallel state and the output terminal provides a voltage indicative of a temperature of the MTJ device based on an MTJ antiparallel resistance. A distributed sensor network for real-time thermal mapping of an integrated circuit (IC) is also described.

Abstract: A base element for switching a magnetization state of a nanomagnet includes a heavy-metal nanostrip having a surface. The heavy-metal nanostrip includes at least a first layer including a heavy metal and a second layer which includes a different heavy-metal. A ferromagnetic nanomagnet is disposed adjacent to the surface. The ferromagnetic nanomagnet includes a shape having a long axis and a short axis, the ferromagnetic nanomagnet having both a perpendicular-to-the-plane anisotropy Hkz and an in-plane anisotropy Hkx and the ferromagnetic nanomagnet having a first magnetization equilibrium state and a second magnetization equilibrium state. The first magnetization equilibrium state or the second magnetization equilibrium state is settable by a flow of electrical charge through the heavy-metal nanostrip. A direction of the flow of electrical charge through the heavy-metal nanostrip includes an angle ? with respect to the short axis of the nanomagnet.